[][src]Module imxrt1062_gpt1::cr

GPT Control Register

Structs

CLKSRC_W

Write proxy for field CLKSRC

DBGEN_W

Write proxy for field DBGEN

DOZEEN_W

Write proxy for field DOZEEN

ENMOD_W

Write proxy for field ENMOD

EN_24M_W

Write proxy for field EN_24M

EN_W

Write proxy for field EN

FO1_W

Write proxy for field FO1

FO2_W

Write proxy for field FO2

FO3_W

Write proxy for field FO3

FRR_W

Write proxy for field FRR

IM1_W

Write proxy for field IM1

IM2_W

Write proxy for field IM2

OM1_W

Write proxy for field OM1

OM2_W

Write proxy for field OM2

OM3_W

Write proxy for field OM3

STOPEN_W

Write proxy for field STOPEN

SWR_W

Write proxy for field SWR

WAITEN_W

Write proxy for field WAITEN

Enums

CLKSRC_A

Clock Source select

DBGEN_A

GPT debug mode enable

DOZEEN_A

GPT Doze Mode Enable

ENMOD_A

GPT Enable mode

EN_24M_A

Enable 24 MHz clock input from crystal

EN_A

GPT Enable

FO3_A

FO3 Force Output Compare Channel 3 FO2 Force Output Compare Channel 2 FO1 Force Output Compare Channel 1 The FOn bit causes the pin action programmed for the timer Output Compare n pin (according to the OMn bits in this register)

FRR_A

Free-Run or Restart mode

IM2_A

IM2 (bits 19-18, Input Capture Channel 2 operating mode) IM1 (bits 17-16, Input Capture Channel 1 operating mode) The IMn bit field determines the transition on the input pin (for Input capture channel n), which will trigger a capture event

OM3_A

OM3 (bits 28-26) controls the Output Compare Channel 3 operating mode

STOPEN_A

GPT Stop Mode enable

SWR_A

Software reset

WAITEN_A

GPT Wait Mode enable

Type Definitions

CLKSRC_R

Reader of field CLKSRC

DBGEN_R

Reader of field DBGEN

DOZEEN_R

Reader of field DOZEEN

ENMOD_R

Reader of field ENMOD

EN_24M_R

Reader of field EN_24M

EN_R

Reader of field EN

FO1_R

Reader of field FO1

FO2_R

Reader of field FO2

FO3_R

Reader of field FO3

FRR_R

Reader of field FRR

IM1_R

Reader of field IM1

IM2_R

Reader of field IM2

OM1_R

Reader of field OM1

OM2_R

Reader of field OM2

OM3_R

Reader of field OM3

R

Reader of register CR

STOPEN_R

Reader of field STOPEN

SWR_R

Reader of field SWR

W

Writer for register CR

WAITEN_R

Reader of field WAITEN