[][src]Type Definition imxrt1062_flexspi::dllcr::R

type R = R<u32, DLLCR>;

Reader of register DLLCR%s

Methods

impl R[src]

pub fn dllen(&self) -> DLLEN_R[src]

Bit 0 - DLL calibration enable.

pub fn dllreset(&self) -> DLLRESET_R[src]

Bit 1 - Software could force a reset on DLL by setting this field to 0x1. This will cause the DLL to lose lock and re-calibrate to detect an ref_clock half period phase shift. The reset action is edge triggered, so software need to clear this bit after set this bit (no delay limitation).

pub fn slvdlytarget(&self) -> SLVDLYTARGET_R[src]

Bits 3:6 - The delay target for slave delay line is: ((SLVDLYTARGET+1) * 1/32 * clock cycle of reference clock (serial clock).

pub fn ovrden(&self) -> OVRDEN_R[src]

Bit 8 - Slave clock delay line delay cell number selection override enable.

pub fn ovrdval(&self) -> OVRDVAL_R[src]

Bits 9:14 - Slave clock delay line delay cell number selection override value.