[−][src]Struct imxrt1062_enet::W
Methods
impl<U, REG> W<U, REG>
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impl W<u32, Reg<u32, _EIR>>
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pub fn ts_timer(&mut self) -> TS_TIMER_W
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Bit 15 - Timestamp Timer
pub fn ts_avail(&mut self) -> TS_AVAIL_W
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Bit 16 - Transmit Timestamp Available
pub fn wakeup(&mut self) -> WAKEUP_W
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Bit 17 - Node Wakeup Request Indication
pub fn plr(&mut self) -> PLR_W
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Bit 18 - Payload Receive Error
pub fn un(&mut self) -> UN_W
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Bit 19 - Transmit FIFO Underrun
pub fn rl(&mut self) -> RL_W
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Bit 20 - Collision Retry Limit
pub fn lc(&mut self) -> LC_W
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Bit 21 - Late Collision
pub fn eberr(&mut self) -> EBERR_W
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Bit 22 - Ethernet Bus Error
pub fn mii(&mut self) -> MII_W
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Bit 23 - MII Interrupt.
pub fn rxb(&mut self) -> RXB_W
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Bit 24 - Receive Buffer Interrupt
pub fn rxf(&mut self) -> RXF_W
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Bit 25 - Receive Frame Interrupt
pub fn txb(&mut self) -> TXB_W
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Bit 26 - Transmit Buffer Interrupt
pub fn txf(&mut self) -> TXF_W
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Bit 27 - Transmit Frame Interrupt
pub fn gra(&mut self) -> GRA_W
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Bit 28 - Graceful Stop Complete
pub fn babt(&mut self) -> BABT_W
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Bit 29 - Babbling Transmit Error
pub fn babr(&mut self) -> BABR_W
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Bit 30 - Babbling Receive Error
impl W<u32, Reg<u32, _EIMR>>
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pub fn ts_timer(&mut self) -> TS_TIMER_W
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Bit 15 - TS_TIMER Interrupt Mask
pub fn ts_avail(&mut self) -> TS_AVAIL_W
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Bit 16 - TS_AVAIL Interrupt Mask
pub fn wakeup(&mut self) -> WAKEUP_W
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Bit 17 - WAKEUP Interrupt Mask
pub fn plr(&mut self) -> PLR_W
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Bit 18 - PLR Interrupt Mask
pub fn un(&mut self) -> UN_W
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Bit 19 - UN Interrupt Mask
pub fn rl(&mut self) -> RL_W
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Bit 20 - RL Interrupt Mask
pub fn lc(&mut self) -> LC_W
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Bit 21 - LC Interrupt Mask
pub fn eberr(&mut self) -> EBERR_W
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Bit 22 - EBERR Interrupt Mask
pub fn mii(&mut self) -> MII_W
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Bit 23 - MII Interrupt Mask
pub fn rxb(&mut self) -> RXB_W
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Bit 24 - RXB Interrupt Mask
pub fn rxf(&mut self) -> RXF_W
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Bit 25 - RXF Interrupt Mask
pub fn txb(&mut self) -> TXB_W
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Bit 26 - TXB Interrupt Mask
pub fn txf(&mut self) -> TXF_W
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Bit 27 - TXF Interrupt Mask
pub fn gra(&mut self) -> GRA_W
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Bit 28 - GRA Interrupt Mask
pub fn babt(&mut self) -> BABT_W
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Bit 29 - BABT Interrupt Mask
pub fn babr(&mut self) -> BABR_W
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Bit 30 - BABR Interrupt Mask
impl W<u32, Reg<u32, _RDAR>>
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impl W<u32, Reg<u32, _TDAR>>
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impl W<u32, Reg<u32, _ECR>>
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pub fn reset(&mut self) -> RESET_W
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Bit 0 - Ethernet MAC Reset
pub fn etheren(&mut self) -> ETHEREN_W
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Bit 1 - Ethernet Enable
pub fn magicen(&mut self) -> MAGICEN_W
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Bit 2 - Magic Packet Detection Enable
pub fn sleep(&mut self) -> SLEEP_W
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Bit 3 - Sleep Mode Enable
pub fn en1588(&mut self) -> EN1588_W
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Bit 4 - EN1588 Enable
pub fn dbgen(&mut self) -> DBGEN_W
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Bit 6 - Debug Enable
pub fn dbswp(&mut self) -> DBSWP_W
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Bit 8 - Descriptor Byte Swapping Enable
impl W<u32, Reg<u32, _MMFR>>
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pub fn data(&mut self) -> DATA_W
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Bits 0:15 - Management Frame Data
pub fn ta(&mut self) -> TA_W
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Bits 16:17 - Turn Around
pub fn ra(&mut self) -> RA_W
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Bits 18:22 - Register Address
pub fn pa(&mut self) -> PA_W
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Bits 23:27 - PHY Address
pub fn op(&mut self) -> OP_W
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Bits 28:29 - Operation Code
pub fn st(&mut self) -> ST_W
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Bits 30:31 - Start Of Frame Delimiter
impl W<u32, Reg<u32, _MSCR>>
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pub fn mii_speed(&mut self) -> MII_SPEED_W
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Bits 1:6 - MII Speed
pub fn dis_pre(&mut self) -> DIS_PRE_W
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Bit 7 - Disable Preamble
pub fn holdtime(&mut self) -> HOLDTIME_W
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Bits 8:10 - Hold time On MDIO Output
impl W<u32, Reg<u32, _MIBC>>
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pub fn mib_clear(&mut self) -> MIB_CLEAR_W
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Bit 29 - MIB Clear
pub fn mib_dis(&mut self) -> MIB_DIS_W
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Bit 31 - Disable MIB Logic
impl W<u32, Reg<u32, _RCR>>
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pub fn loop_(&mut self) -> LOOP_W
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Bit 0 - Internal Loopback
pub fn drt(&mut self) -> DRT_W
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Bit 1 - Disable Receive On Transmit
pub fn mii_mode(&mut self) -> MII_MODE_W
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Bit 2 - Media Independent Interface Mode
pub fn prom(&mut self) -> PROM_W
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Bit 3 - Promiscuous Mode
pub fn bc_rej(&mut self) -> BC_REJ_W
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Bit 4 - Broadcast Frame Reject
pub fn fce(&mut self) -> FCE_W
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Bit 5 - Flow Control Enable
pub fn rmii_mode(&mut self) -> RMII_MODE_W
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Bit 8 - RMII Mode Enable
pub fn rmii_10t(&mut self) -> RMII_10T_W
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Bit 9 - Enables 10-Mbit/s mode of the RMII .
pub fn paden(&mut self) -> PADEN_W
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Bit 12 - Enable Frame Padding Remove On Receive
pub fn paufwd(&mut self) -> PAUFWD_W
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Bit 13 - Terminate/Forward Pause Frames
pub fn crcfwd(&mut self) -> CRCFWD_W
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Bit 14 - Terminate/Forward Received CRC
pub fn cfen(&mut self) -> CFEN_W
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Bit 15 - MAC Control Frame Enable
pub fn max_fl(&mut self) -> MAX_FL_W
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Bits 16:29 - Maximum Frame Length
pub fn nlc(&mut self) -> NLC_W
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Bit 30 - Payload Length Check Disable
impl W<u32, Reg<u32, _TCR>>
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pub fn gts(&mut self) -> GTS_W
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Bit 0 - Graceful Transmit Stop
pub fn fden(&mut self) -> FDEN_W
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Bit 2 - Full-Duplex Enable
pub fn tfc_pause(&mut self) -> TFC_PAUSE_W
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Bit 3 - Transmit Frame Control Pause
pub fn addsel(&mut self) -> ADDSEL_W
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Bits 5:7 - Source MAC Address Select On Transmit
pub fn addins(&mut self) -> ADDINS_W
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Bit 8 - Set MAC Address On Transmit
pub fn crcfwd(&mut self) -> CRCFWD_W
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Bit 9 - Forward Frame From Application With CRC
impl W<u32, Reg<u32, _PALR>>
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impl W<u32, Reg<u32, _PAUR>>
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pub fn paddr2(&mut self) -> PADDR2_W
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Bits 16:31 - Bytes 4 (bits 31:24) and 5 (bits 23:16) of the 6-byte individual address used for exact match, and the source address field in PAUSE frames
impl W<u32, Reg<u32, _OPD>>
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pub fn pause_dur(&mut self) -> PAUSE_DUR_W
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Bits 0:15 - Pause Duration
impl W<u32, Reg<u32, _TXIC>>
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pub fn ictt(&mut self) -> ICTT_W
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Bits 0:15 - Interrupt coalescing timer threshold
pub fn icft(&mut self) -> ICFT_W
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Bits 20:27 - Interrupt coalescing frame count threshold
pub fn iccs(&mut self) -> ICCS_W
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Bit 30 - Interrupt Coalescing Timer Clock Source Select
pub fn icen(&mut self) -> ICEN_W
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Bit 31 - Interrupt Coalescing Enable
impl W<u32, Reg<u32, _RXIC>>
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pub fn ictt(&mut self) -> ICTT_W
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Bits 0:15 - Interrupt coalescing timer threshold
pub fn icft(&mut self) -> ICFT_W
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Bits 20:27 - Interrupt coalescing frame count threshold
pub fn iccs(&mut self) -> ICCS_W
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Bit 30 - Interrupt Coalescing Timer Clock Source Select
pub fn icen(&mut self) -> ICEN_W
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Bit 31 - Interrupt Coalescing Enable
impl W<u32, Reg<u32, _IAUR>>
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pub fn iaddr1(&mut self) -> IADDR1_W
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Bits 0:31 - Contains the upper 32 bits of the 64-bit hash table used in the address recognition process for receive frames with a unicast address
impl W<u32, Reg<u32, _IALR>>
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pub fn iaddr2(&mut self) -> IADDR2_W
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Bits 0:31 - Contains the lower 32 bits of the 64-bit hash table used in the address recognition process for receive frames with a unicast address
impl W<u32, Reg<u32, _GAUR>>
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pub fn gaddr1(&mut self) -> GADDR1_W
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Bits 0:31 - Contains the upper 32 bits of the 64-bit hash table used in the address recognition process for receive frames with a multicast address
impl W<u32, Reg<u32, _GALR>>
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pub fn gaddr2(&mut self) -> GADDR2_W
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Bits 0:31 - Contains the lower 32 bits of the 64-bit hash table used in the address recognition process for receive frames with a multicast address
impl W<u32, Reg<u32, _TFWR>>
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pub fn tfwr(&mut self) -> TFWR_W
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Bits 0:5 - Transmit FIFO Write
pub fn strfwd(&mut self) -> STRFWD_W
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Bit 8 - Store And Forward Enable
impl W<u32, Reg<u32, _RDSR>>
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pub fn r_des_start(&mut self) -> R_DES_START_W
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Bits 3:31 - Pointer to the beginning of the receive buffer descriptor queue.
impl W<u32, Reg<u32, _TDSR>>
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pub fn x_des_start(&mut self) -> X_DES_START_W
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Bits 3:31 - Pointer to the beginning of the transmit buffer descriptor queue.
impl W<u32, Reg<u32, _MRBR>>
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pub fn r_buf_size(&mut self) -> R_BUF_SIZE_W
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Bits 4:13 - Receive buffer size in bytes
impl W<u32, Reg<u32, _RSFL>>
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pub fn rx_section_full(&mut self) -> RX_SECTION_FULL_W
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Bits 0:7 - Value Of Receive FIFO Section Full Threshold
impl W<u32, Reg<u32, _RSEM>>
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pub fn rx_section_empty(&mut self) -> RX_SECTION_EMPTY_W
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Bits 0:7 - Value Of The Receive FIFO Section Empty Threshold
pub fn stat_section_empty(&mut self) -> STAT_SECTION_EMPTY_W
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Bits 16:20 - RX Status FIFO Section Empty Threshold
impl W<u32, Reg<u32, _RAEM>>
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pub fn rx_almost_empty(&mut self) -> RX_ALMOST_EMPTY_W
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Bits 0:7 - Value Of The Receive FIFO Almost Empty Threshold
impl W<u32, Reg<u32, _RAFL>>
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pub fn rx_almost_full(&mut self) -> RX_ALMOST_FULL_W
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Bits 0:7 - Value Of The Receive FIFO Almost Full Threshold
impl W<u32, Reg<u32, _TSEM>>
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pub fn tx_section_empty(&mut self) -> TX_SECTION_EMPTY_W
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Bits 0:7 - Value Of The Transmit FIFO Section Empty Threshold
impl W<u32, Reg<u32, _TAEM>>
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pub fn tx_almost_empty(&mut self) -> TX_ALMOST_EMPTY_W
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Bits 0:7 - Value of Transmit FIFO Almost Empty Threshold
impl W<u32, Reg<u32, _TAFL>>
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pub fn tx_almost_full(&mut self) -> TX_ALMOST_FULL_W
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Bits 0:7 - Value Of The Transmit FIFO Almost Full Threshold
impl W<u32, Reg<u32, _TIPG>>
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impl W<u32, Reg<u32, _FTRL>>
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pub fn trunc_fl(&mut self) -> TRUNC_FL_W
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Bits 0:13 - Frame Truncation Length
impl W<u32, Reg<u32, _TACC>>
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pub fn shift16(&mut self) -> SHIFT16_W
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Bit 0 - TX FIFO Shift-16
pub fn ipchk(&mut self) -> IPCHK_W
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Bit 3 - Enables insertion of IP header checksum.
pub fn prochk(&mut self) -> PROCHK_W
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Bit 4 - Enables insertion of protocol checksum.
impl W<u32, Reg<u32, _RACC>>
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pub fn padrem(&mut self) -> PADREM_W
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Bit 0 - Enable Padding Removal For Short IP Frames
pub fn ipdis(&mut self) -> IPDIS_W
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Bit 1 - Enable Discard Of Frames With Wrong IPv4 Header Checksum
pub fn prodis(&mut self) -> PRODIS_W
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Bit 2 - Enable Discard Of Frames With Wrong Protocol Checksum
pub fn linedis(&mut self) -> LINEDIS_W
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Bit 6 - Enable Discard Of Frames With MAC Layer Errors
pub fn shift16(&mut self) -> SHIFT16_W
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Bit 7 - RX FIFO Shift-16
impl W<u32, Reg<u32, _ATCR>>
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pub fn en(&mut self) -> EN_W
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Bit 0 - Enable Timer
pub fn offen(&mut self) -> OFFEN_W
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Bit 2 - Enable One-Shot Offset Event
pub fn offrst(&mut self) -> OFFRST_W
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Bit 3 - Reset Timer On Offset Event
pub fn peren(&mut self) -> PEREN_W
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Bit 4 - Enable Periodical Event
pub fn pinper(&mut self) -> PINPER_W
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Bit 7 - Enables event signal output assertion on period event
pub fn restart(&mut self) -> RESTART_W
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Bit 9 - Reset Timer
pub fn capture(&mut self) -> CAPTURE_W
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Bit 11 - Capture Timer Value
pub fn slave(&mut self) -> SLAVE_W
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Bit 13 - Enable Timer Slave Mode
impl W<u32, Reg<u32, _ATVR>>
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impl W<u32, Reg<u32, _ATOFF>>
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impl W<u32, Reg<u32, _ATPER>>
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impl W<u32, Reg<u32, _ATCOR>>
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impl W<u32, Reg<u32, _ATINC>>
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pub fn inc(&mut self) -> INC_W
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Bits 0:6 - Clock Period Of The Timestamping Clock (ts_clk) In Nanoseconds
pub fn inc_corr(&mut self) -> INC_CORR_W
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Bits 8:14 - Correction Increment Value
impl W<u32, Reg<u32, _TGSR>>
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pub fn tf0(&mut self) -> TF0_W
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Bit 0 - Copy Of Timer Flag For Channel 0
pub fn tf1(&mut self) -> TF1_W
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Bit 1 - Copy Of Timer Flag For Channel 1
pub fn tf2(&mut self) -> TF2_W
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Bit 2 - Copy Of Timer Flag For Channel 2
pub fn tf3(&mut self) -> TF3_W
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Bit 3 - Copy Of Timer Flag For Channel 3
impl W<u32, Reg<u32, _TCSR>>
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pub fn tdre(&mut self) -> TDRE_W
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Bit 0 - Timer DMA Request Enable
pub fn tmode(&mut self) -> TMODE_W
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Bits 2:5 - Timer Mode
pub fn tie(&mut self) -> TIE_W
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Bit 6 - Timer Interrupt Enable
pub fn tf(&mut self) -> TF_W
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Bit 7 - Timer Flag
pub fn tpwc(&mut self) -> TPWC_W
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Bits 11:15 - Timer PulseWidth Control
impl W<u32, Reg<u32, _TCCR>>
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Auto Trait Implementations
impl<U, REG> Send for W<U, REG> where
REG: Send,
U: Send,
REG: Send,
U: Send,
impl<U, REG> Sync for W<U, REG> where
REG: Sync,
U: Sync,
REG: Sync,
U: Sync,
impl<U, REG> Unpin for W<U, REG> where
REG: Unpin,
U: Unpin,
REG: Unpin,
U: Unpin,
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized,
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T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
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T: ?Sized,
fn borrow_mut(&mut self) -> &mut T
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impl<T> From<T> for T
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impl<T, U> Into<U> for T where
U: From<T>,
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U: From<T>,
impl<T, U> TryFrom<U> for T where
U: Into<T>,
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U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
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impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
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U: TryFrom<T>,