[−][src]Type Definition imxrt1062_ccm::ccgr3::W
type W = W<u32, CCGR3>;
Writer for register CCGR3
Methods
impl W
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pub fn cg0(&mut self) -> CG0_W
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Bits 0:1 - flexio2 clocks (flexio2_clk_enable)
pub fn cg1(&mut self) -> CG1_W
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Bits 2:3 - lpuart5 clock (lpuart5_clk_enable)
pub fn cg2(&mut self) -> CG2_W
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Bits 4:5 - semc clocks (semc_clk_enable)
pub fn cg3(&mut self) -> CG3_W
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Bits 6:7 - lpuart6 clock (lpuart6_clk_enable)
pub fn cg4(&mut self) -> CG4_W
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Bits 8:9 - aoi1 clock (aoi1_clk_enable)
pub fn cg5(&mut self) -> CG5_W
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Bits 10:11 - lcdif pix clock (lcdif_pix_clk_enable)
pub fn cg6(&mut self) -> CG6_W
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Bits 12:13 - gpio4 clock (gpio4_clk_enable)
pub fn cg7(&mut self) -> CG7_W
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Bits 14:15 - ewm clocks (ewm_clk_enable)
pub fn cg8(&mut self) -> CG8_W
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Bits 16:17 - wdog1 clock (wdog1_clk_enable)
pub fn cg9(&mut self) -> CG9_W
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Bits 18:19 - flexram clock (flexram_clk_enable)
pub fn cg10(&mut self) -> CG10_W
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Bits 20:21 - acmp1 clocks (acmp1_clk_enable)
pub fn cg11(&mut self) -> CG11_W
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Bits 22:23 - acmp2 clocks (acmp2_clk_enable)
pub fn cg12(&mut self) -> CG12_W
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Bits 24:25 - acmp3 clocks (acmp3_clk_enable)
pub fn cg13(&mut self) -> CG13_W
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Bits 26:27 - acmp4 clocks (acmp4_clk_enable)
pub fn cg14(&mut self) -> CG14_W
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Bits 28:29 - The OCRAM clock cannot be turned off when the CM cache is running on this device.
pub fn cg15(&mut self) -> CG15_W
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Bits 30:31 - iomuxc_snvs_gpr clock (iomuxc_snvs_gpr_clk_enable)