[−][src]Type Definition imxrt1062_ccm::clpcr::W
type W = W<u32, CLPCR>;
Writer for register CLPCR
Methods
impl W
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pub fn lpm(&mut self) -> LPM_W
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Bits 0:1 - Setting the low power mode that system will enter on next assertion of dsm_request signal.
pub fn arm_clk_dis_on_lpm(&mut self) -> ARM_CLK_DIS_ON_LPM_W
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Bit 5 - Define if ARM clocks (arm_clk, soc_mxclk, soc_pclk, soc_dbg_pclk, vl_wrck) will be disabled on wait mode
pub fn sbyos(&mut self) -> SBYOS_W
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Bit 6 - Standby clock oscillator bit
pub fn dis_ref_osc(&mut self) -> DIS_REF_OSC_W
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Bit 7 - dis_ref_osc - in run mode, software can manually control closing of external reference oscillator clock, i
pub fn vstby(&mut self) -> VSTBY_W
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Bit 8 - Voltage standby request bit
pub fn stby_count(&mut self) -> STBY_COUNT_W
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Bits 9:10 - Standby counter definition
pub fn cosc_pwrdown(&mut self) -> COSC_PWRDOWN_W
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Bit 11 - In run mode, software can manually control powering down of on chip oscillator, i
pub fn bypass_lpm_hs1(&mut self) -> BYPASS_LPM_HS1_W
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Bit 19 - Bypass low power mode handshake. This bit should always be set to 1'b1 by software.
pub fn bypass_lpm_hs0(&mut self) -> BYPASS_LPM_HS0_W
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Bit 21 - Bypass low power mode handshake. This bit should always be set to 1'b1 by software.
pub fn mask_core0_wfi(&mut self) -> MASK_CORE0_WFI_W
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Bit 22 - Mask WFI of core0 for entering low power mode Assertion of all bits[27:22] will generate low power mode request
pub fn mask_scu_idle(&mut self) -> MASK_SCU_IDLE_W
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Bit 26 - Mask SCU IDLE for entering low power mode Assertion of all bits[27:22] will generate low power mode request
pub fn mask_l2cc_idle(&mut self) -> MASK_L2CC_IDLE_W
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Bit 27 - Mask L2CC IDLE for entering low power mode