Type Definition imxrt1062_ccm::clpcr::R

type R = R<u32, CLPCR>;

Reader of register CLPCR

Methods

impl R

pub fn lpm(&self) -> LPM_R

Bits 0:1 - Setting the low power mode that system will enter on next assertion of dsm_request signal.

pub fn arm_clk_dis_on_lpm(&self) -> ARM_CLK_DIS_ON_LPM_R

Bit 5 - Define if ARM clocks (arm_clk, soc_mxclk, soc_pclk, soc_dbg_pclk, vl_wrck) will be disabled on wait mode

pub fn sbyos(&self) -> SBYOS_R

Bit 6 - Standby clock oscillator bit

pub fn dis_ref_osc(&self) -> DIS_REF_OSC_R

Bit 7 - dis_ref_osc - in run mode, software can manually control closing of external reference oscillator clock, i

pub fn vstby(&self) -> VSTBY_R

Bit 8 - Voltage standby request bit

pub fn stby_count(&self) -> STBY_COUNT_R

Bits 9:10 - Standby counter definition

pub fn cosc_pwrdown(&self) -> COSC_PWRDOWN_R

Bit 11 - In run mode, software can manually control powering down of on chip oscillator, i

pub fn bypass_lpm_hs1(&self) -> BYPASS_LPM_HS1_R

Bit 19 - Bypass low power mode handshake. This bit should always be set to 1'b1 by software.

pub fn bypass_lpm_hs0(&self) -> BYPASS_LPM_HS0_R

Bit 21 - Bypass low power mode handshake. This bit should always be set to 1'b1 by software.

pub fn mask_core0_wfi(&self) -> MASK_CORE0_WFI_R

Bit 22 - Mask WFI of core0 for entering low power mode Assertion of all bits[27:22] will generate low power mode request

pub fn mask_scu_idle(&self) -> MASK_SCU_IDLE_R

Bit 26 - Mask SCU IDLE for entering low power mode Assertion of all bits[27:22] will generate low power mode request

pub fn mask_l2cc_idle(&self) -> MASK_L2CC_IDLE_R

Bit 27 - Mask L2CC IDLE for entering low power mode