Module imxrt1062_ccm::cdcdr

CCM D1 Clock Divider Register

Structs

FLEXIO1_CLK_SEL_W	Write proxy for field FLEXIO1_CLK_SEL
FLEXIO1_CLK_PODF_W	Write proxy for field FLEXIO1_CLK_PODF
FLEXIO1_CLK_PRED_W	Write proxy for field FLEXIO1_CLK_PRED
SPDIF0_CLK_SEL_W	Write proxy for field SPDIF0_CLK_SEL
SPDIF0_CLK_PODF_W	Write proxy for field SPDIF0_CLK_PODF
SPDIF0_CLK_PRED_W	Write proxy for field SPDIF0_CLK_PRED

Enums

FLEXIO1_CLK_SEL_A	Selector for flexio1 clock multiplexer
FLEXIO1_CLK_PODF_A	Divider for flexio1 clock podf. Divider should be updated when output clock is gated.
FLEXIO1_CLK_PRED_A	Divider for flexio1 clock pred. Divider should be updated when output clock is gated.
SPDIF0_CLK_SEL_A	Selector for spdif0 clock multiplexer
SPDIF0_CLK_PODF_A	Divider for spdif0 clock podf. Divider should be updated when output clock is gated.
SPDIF0_CLK_PRED_A	Divider for spdif0 clock pred. Divider should be updated when output clock is gated.

Type Definitions

FLEXIO1_CLK_SEL_R	Reader of field FLEXIO1_CLK_SEL
FLEXIO1_CLK_PODF_R	Reader of field FLEXIO1_CLK_PODF
FLEXIO1_CLK_PRED_R	Reader of field FLEXIO1_CLK_PRED
R	Reader of register CDCDR
SPDIF0_CLK_SEL_R	Reader of field SPDIF0_CLK_SEL
SPDIF0_CLK_PODF_R	Reader of field SPDIF0_CLK_PODF
SPDIF0_CLK_PRED_R	Reader of field SPDIF0_CLK_PRED
W	Writer for register CDCDR