[−][src]Type Definition imxrt1062_ccm::ccgr0::R
type R = R<u32, CCGR0>;
Reader of register CCGR0
Methods
impl R
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pub fn cg0(&self) -> CG0_R
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Bits 0:1 - aips_tz1 clocks (aips_tz1_clk_enable)
pub fn cg1(&self) -> CG1_R
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Bits 2:3 - aips_tz2 clocks (aips_tz2_clk_enable)
pub fn cg2(&self) -> CG2_R
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Bits 4:5 - mqs clock ( mqs_hmclk_clock_enable)
pub fn cg3(&self) -> CG3_R
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Bits 6:7 - flexspi_exsc clock (flexspi_exsc_clk_enable)
pub fn cg4(&self) -> CG4_R
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Bits 8:9 - sim_m or sim_main register access clock (sim_m_mainclk_r_enable)
pub fn cg5(&self) -> CG5_R
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Bits 10:11 - dcp clock (dcp_clk_enable)
pub fn cg6(&self) -> CG6_R
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Bits 12:13 - lpuart3 clock (lpuart3_clk_enable)
pub fn cg7(&self) -> CG7_R
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Bits 14:15 - can1 clock (can1_clk_enable)
pub fn cg8(&self) -> CG8_R
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Bits 16:17 - can1_serial clock (can1_serial_clk_enable)
pub fn cg9(&self) -> CG9_R
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Bits 18:19 - can2 clock (can2_clk_enable)
pub fn cg10(&self) -> CG10_R
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Bits 20:21 - can2_serial clock (can2_serial_clk_enable)
pub fn cg11(&self) -> CG11_R
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Bits 22:23 - trace clock (trace_clk_enable)
pub fn cg12(&self) -> CG12_R
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Bits 24:25 - gpt2 bus clocks (gpt2_bus_clk_enable)
pub fn cg13(&self) -> CG13_R
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Bits 26:27 - gpt2 serial clocks (gpt2_serial_clk_enable)
pub fn cg14(&self) -> CG14_R
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Bits 28:29 - lpuart2 clock (lpuart2_clk_enable)
pub fn cg15(&self) -> CG15_R
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Bits 30:31 - gpio2_clocks (gpio2_clk_enable)