[−][src]Module imxrt1062_ccm::clpcr
CCM Low Power Control Register
Structs
ARM_CLK_DIS_ON_LPM_W | Write proxy for field |
BYPASS_LPM_HS0_W | Write proxy for field |
BYPASS_LPM_HS1_W | Write proxy for field |
COSC_PWRDOWN_W | Write proxy for field |
DIS_REF_OSC_W | Write proxy for field |
LPM_W | Write proxy for field |
MASK_CORE0_WFI_W | Write proxy for field |
MASK_L2CC_IDLE_W | Write proxy for field |
MASK_SCU_IDLE_W | Write proxy for field |
SBYOS_W | Write proxy for field |
STBY_COUNT_W | Write proxy for field |
VSTBY_W | Write proxy for field |
Enums
ARM_CLK_DIS_ON_LPM_A | Define if ARM clocks (arm_clk, soc_mxclk, soc_pclk, soc_dbg_pclk, vl_wrck) will be disabled on wait mode |
COSC_PWRDOWN_A | In run mode, software can manually control powering down of on chip oscillator, i |
DIS_REF_OSC_A | dis_ref_osc - in run mode, software can manually control closing of external reference oscillator clock, i |
LPM_A | Setting the low power mode that system will enter on next assertion of dsm_request signal. |
MASK_CORE0_WFI_A | Mask WFI of core0 for entering low power mode Assertion of all bits[27:22] will generate low power mode request |
MASK_L2CC_IDLE_A | Mask L2CC IDLE for entering low power mode |
MASK_SCU_IDLE_A | Mask SCU IDLE for entering low power mode Assertion of all bits[27:22] will generate low power mode request |
SBYOS_A | Standby clock oscillator bit |
STBY_COUNT_A | Standby counter definition |
VSTBY_A | Voltage standby request bit |
Type Definitions
ARM_CLK_DIS_ON_LPM_R | Reader of field |
BYPASS_LPM_HS0_R | Reader of field |
BYPASS_LPM_HS1_R | Reader of field |
COSC_PWRDOWN_R | Reader of field |
DIS_REF_OSC_R | Reader of field |
LPM_R | Reader of field |
MASK_CORE0_WFI_R | Reader of field |
MASK_L2CC_IDLE_R | Reader of field |
MASK_SCU_IDLE_R | Reader of field |
R | Reader of register CLPCR |
SBYOS_R | Reader of field |
STBY_COUNT_R | Reader of field |
VSTBY_R | Reader of field |
W | Writer for register CLPCR |