[][src]Type Definition imxrt1062_ccm_analog::pll_enet_set::W

type W = W<u32, PLL_ENET_SET>;

Writer for register PLL_ENET_SET

Methods

impl W[src]

pub fn div_select(&mut self) -> DIV_SELECT_W[src]

Bits 0:1 - Controls the frequency of the ethernet reference clock

pub fn enet2_div_select(&mut self) -> ENET2_DIV_SELECT_W[src]

Bits 2:3 - Controls the frequency of the ENET2 reference clock.

pub fn powerdown(&mut self) -> POWERDOWN_W[src]

Bit 12 - Powers down the PLL.

pub fn enable(&mut self) -> ENABLE_W[src]

Bit 13 - Enable the PLL providing the ENET reference clock.

pub fn bypass_clk_src(&mut self) -> BYPASS_CLK_SRC_W[src]

Bits 14:15 - Determines the bypass source.

pub fn bypass(&mut self) -> BYPASS_W[src]

Bit 16 - Bypass the PLL.

pub fn enet2_ref_en(&mut self) -> ENET2_REF_EN_W[src]

Bit 20 - Enable the PLL providing the ENET2 reference clock

pub fn enet_25m_ref_en(&mut self) -> ENET_25M_REF_EN_W[src]

Bit 21 - Enable the PLL providing ENET 25 MHz reference clock