[−][src]Type Definition imxrt1062_ccm_analog::pll_audio_clr::W
type W = W<u32, PLL_AUDIO_CLR>;
Writer for register PLL_AUDIO_CLR
Methods
impl W
[src]
pub fn div_select(&mut self) -> DIV_SELECT_W
[src]
Bits 0:6 - This field controls the PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.
pub fn powerdown(&mut self) -> POWERDOWN_W
[src]
Bit 12 - Powers down the PLL.
pub fn enable(&mut self) -> ENABLE_W
[src]
Bit 13 - Enable PLL output
pub fn bypass_clk_src(&mut self) -> BYPASS_CLK_SRC_W
[src]
Bits 14:15 - Determines the bypass source.
pub fn bypass(&mut self) -> BYPASS_W
[src]
Bit 16 - Bypass the PLL.
pub fn post_div_select(&mut self) -> POST_DIV_SELECT_W
[src]
Bits 19:20 - These bits implement a divider after the PLL, but before the enable and bypass mux.