[−][src]Type Definition imxrt1062_ccm_analog::pfd_528_clr::W
type W = W<u32, PFD_528_CLR>;
Writer for register PFD_528_CLR
Methods
impl W
[src]
pub fn pfd0_frac(&mut self) -> PFD0_FRAC_W
[src]
Bits 0:5 - This field controls the fractional divide value
pub fn pfd0_clkgate(&mut self) -> PFD0_CLKGATE_W
[src]
Bit 7 - If set to 1, the IO fractional divider clock (reference ref_pfd0) is off (power savings)
pub fn pfd1_frac(&mut self) -> PFD1_FRAC_W
[src]
Bits 8:13 - This field controls the fractional divide value
pub fn pfd1_clkgate(&mut self) -> PFD1_CLKGATE_W
[src]
Bit 15 - IO Clock Gate
pub fn pfd2_frac(&mut self) -> PFD2_FRAC_W
[src]
Bits 16:21 - This field controls the fractional divide value
pub fn pfd2_clkgate(&mut self) -> PFD2_CLKGATE_W
[src]
Bit 23 - IO Clock Gate
pub fn pfd3_frac(&mut self) -> PFD3_FRAC_W
[src]
Bits 24:29 - This field controls the fractional divide value
pub fn pfd3_clkgate(&mut self) -> PFD3_CLKGATE_W
[src]
Bit 31 - IO Clock Gate