[][src]Type Definition imxrt1062_ccm_analog::misc2_clr::W

type W = W<u32, MISC2_CLR>;

Writer for register MISC2_CLR

Methods

impl W[src]

pub fn reg0_enable_bo(&mut self) -> REG0_ENABLE_BO_W[src]

Bit 5 - Enables the brownout detection.Not related to CCM. See Power Management Unit (PMU)

pub fn pll3_disable(&mut self) -> PLL3_DISABLE_W[src]

Bit 7 - When USB is in low power suspend mode this Control bit is used to indicate if other system peripherals require the USB PLL3 clock when the SoC is not in low power mode

pub fn reg1_enable_bo(&mut self) -> REG1_ENABLE_BO_W[src]

Bit 13 - Enables the brownout detection.Not related to CCM. See Power Management Unit (PMU)

pub fn audio_div_lsb(&mut self) -> AUDIO_DIV_LSB_W[src]

Bit 15 - LSB of Post-divider for Audio PLL

pub fn reg2_enable_bo(&mut self) -> REG2_ENABLE_BO_W[src]

Bit 21 - Enables the brownout detection.Not related to CCM. See Power Management Unit (PMU)

pub fn audio_div_msb(&mut self) -> AUDIO_DIV_MSB_W[src]

Bit 23 - MSB of Post-divider for Audio PLL

pub fn reg0_step_time(&mut self) -> REG0_STEP_TIME_W[src]

Bits 24:25 - Number of clock periods (24MHz clock).Not related to CCM. See Power Management Unit (PMU)

pub fn reg1_step_time(&mut self) -> REG1_STEP_TIME_W[src]

Bits 26:27 - Number of clock periods (24MHz clock).Not related to CCM. See Power Management Unit (PMU)

pub fn reg2_step_time(&mut self) -> REG2_STEP_TIME_W[src]

Bits 28:29 - Number of clock periods (24MHz clock).Not related to CCM. See Power Management Unit (PMU)

pub fn video_div(&mut self) -> VIDEO_DIV_W[src]

Bits 30:31 - Post-divider for video