Struct imxrt_hal::lpi2c::ClockConfiguration
source · pub struct ClockConfiguration {
pub clkhi: u8,
pub clklo: u8,
pub sethold: u8,
pub datavd: u8,
pub filtsda: u8,
pub filtscl: u8,
}
Expand description
Clock configuration fields.
These fields are written directly to the clock configuration register. All values are written as-is to the register fields. Values that are less than eight bits are truncated by the implementation. You’re responsible for making sure that these parameters meet their timing parameter restrictions.
Fields§
§clkhi: u8
Clock high period.
Minimum number of cycles that the SCL clock is driven high.
clklo: u8
Clock low period.
Minimum number of cycles that the SCL clock is driven low.
sethold: u8
Setup hold delay.
Minimum number of cycles that’s used for
- START condition hold
- repeated START setup & hold
- START condition setup
datavd: u8
Data valid delay.
Minimum number of cycles for SDA data hold. Must be less than the minimum SCL low period.
filtsda: u8
Glitch filter SDA.
Only four bits large. Value of zero represents “no filter,” and non-zero values represent filtered cycles.
filtscl: u8
Glitch filter for SCL.
Only four bits large. Value of zero represents “no filter,” and non-zero values represent filtered cycles.
Trait Implementations§
source§impl Clone for ClockConfiguration
impl Clone for ClockConfiguration
source§fn clone(&self) -> ClockConfiguration
fn clone(&self) -> ClockConfiguration
1.0.0 · source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source
. Read moresource§impl Debug for ClockConfiguration
impl Debug for ClockConfiguration
source§impl PartialEq for ClockConfiguration
impl PartialEq for ClockConfiguration
source§fn eq(&self, other: &ClockConfiguration) -> bool
fn eq(&self, other: &ClockConfiguration) -> bool
self
and other
values to be equal, and is used
by ==
.