[][src]Struct iced_x86::OpCodeInfo

pub struct OpCodeInfo { /* fields omitted */ }

Opcode info, returned by Code::op_code() and Instruction::op_code()

Implementations

impl OpCodeInfo[src]

#[must_use]pub fn code(&self) -> Code[src]

Gets the code

Examples

use iced_x86::*;

let op_code = Code::EVEX_Vmovapd_ymm_k1z_ymmm256.op_code();
assert_eq!(Code::EVEX_Vmovapd_ymm_k1z_ymmm256, op_code.code());

#[must_use]pub fn encoding(&self) -> EncodingKind[src]

Gets the encoding

Examples

use iced_x86::*;

let op_code = Code::EVEX_Vmovapd_ymm_k1z_ymmm256.op_code();
assert_eq!(EncodingKind::EVEX, op_code.encoding());

#[must_use]pub fn is_instruction(&self) -> bool[src]

true if it's an instruction, false if it's eg. Code::INVALID, db, dw, dd, dq

Examples

use iced_x86::*;

assert!(Code::EVEX_Vmovapd_ymm_k1z_ymmm256.op_code().is_instruction());
assert!(!Code::INVALID.op_code().is_instruction());
assert!(!Code::DeclareByte.op_code().is_instruction());

#[must_use]pub fn mode16(&self) -> bool[src]

true if it's an instruction available in 16-bit mode

#[must_use]pub fn mode32(&self) -> bool[src]

true if it's an instruction available in 32-bit mode

#[must_use]pub fn mode64(&self) -> bool[src]

true if it's an instruction available in 64-bit mode

#[must_use]pub fn fwait(&self) -> bool[src]

true if an FWAIT (9B) instruction is added before the instruction

#[must_use]pub fn operand_size(&self) -> u32[src]

(Legacy encoding) Gets the required operand size (16,32,64) or 0 if no operand size prefix (66) or REX.W prefix is needed

#[must_use]pub fn address_size(&self) -> u32[src]

(Legacy encoding) Gets the required address size (16,32,64) or 0 if no address size prefix (67) is needed

#[must_use]pub fn l(&self) -> u32[src]

(VEX/XOP/EVEX) L / L'L value or default value if is_lig() is true

#[must_use]pub fn w(&self) -> u32[src]

(VEX/XOP/EVEX) W value or default value if is_wig() or is_wig32() is true

#[must_use]pub fn is_lig(&self) -> bool[src]

(VEX/XOP/EVEX) true if the L / L'L fields are ignored.

EVEX: if reg-only ops and {er} (EVEX.b is set), L'L is the rounding control and not ignored.

#[must_use]pub fn is_wig(&self) -> bool[src]

(VEX/XOP/EVEX) true if the W field is ignored in 16/32/64-bit modes

#[must_use]pub fn is_wig32(&self) -> bool[src]

(VEX/XOP/EVEX) true if the W field is ignored in 16/32-bit modes (but not 64-bit mode)

#[must_use]pub fn tuple_type(&self) -> TupleType[src]

(EVEX) Gets the tuple type

#[must_use]pub fn can_broadcast(&self) -> bool[src]

(EVEX) true if the instruction supports broadcasting (EVEX.b bit) (if it has a memory operand)

#[must_use]pub fn can_use_rounding_control(&self) -> bool[src]

(EVEX) true if the instruction supports rounding control

#[must_use]pub fn can_suppress_all_exceptions(&self) -> bool[src]

(EVEX) true if the instruction supports suppress all exceptions

#[must_use]pub fn can_use_op_mask_register(&self) -> bool[src]

(EVEX) true if an op mask register can be used

#[must_use]pub fn require_non_zero_op_mask_register(&self) -> bool[src]

(EVEX) true if a non-zero op mask register must be used

#[must_use]pub fn can_use_zeroing_masking(&self) -> bool[src]

(EVEX) true if the instruction supports zeroing masking (if one of the op mask registers K1-K7 is used and destination operand is not a memory operand)

#[must_use]pub fn can_use_lock_prefix(&self) -> bool[src]

true if the LOCK (F0) prefix can be used

#[must_use]pub fn can_use_xacquire_prefix(&self) -> bool[src]

true if the XACQUIRE (F2) prefix can be used

#[must_use]pub fn can_use_xrelease_prefix(&self) -> bool[src]

true if the XRELEASE (F3) prefix can be used

#[must_use]pub fn can_use_rep_prefix(&self) -> bool[src]

true if the REP / REPE (F3) prefixes can be used

#[must_use]pub fn can_use_repne_prefix(&self) -> bool[src]

true if the REPNE (F2) prefix can be used

#[must_use]pub fn can_use_bnd_prefix(&self) -> bool[src]

true if the BND (F2) prefix can be used

#[must_use]pub fn can_use_hint_taken_prefix(&self) -> bool[src]

true if the HINT-TAKEN (3E) and HINT-NOT-TAKEN (2E) prefixes can be used

#[must_use]pub fn can_use_notrack_prefix(&self) -> bool[src]

true if the NOTRACK (3E) prefix can be used

#[must_use]pub fn table(&self) -> OpCodeTableKind[src]

Gets the opcode table

#[must_use]pub fn mandatory_prefix(&self) -> MandatoryPrefix[src]

Gets the mandatory prefix

#[must_use]pub fn op_code(&self) -> u32[src]

Gets the opcode. 000000xxh if it's 1-byte, 0000yyxxh if it's 2-byte (yy != 00, and yy is the first byte and xx the second byte). It doesn't include the table value, see table().

Examples

use iced_x86::*;

assert_eq!(0xDFC0, Code::Ffreep_sti.op_code().op_code());
assert_eq!(0x01D8, Code::Vmrunw.op_code().op_code());
assert_eq!(0x2A, Code::Sub_r8_rm8.op_code().op_code());
assert_eq!(0x2A, Code::Cvtpi2ps_xmm_mmm64.op_code().op_code());

#[must_use]pub fn is_group(&self) -> bool[src]

true if it's part of a group

#[must_use]pub fn group_index(&self) -> i32[src]

Group index (0-7) or -1. If it's 0-7, it's stored in the reg field of the modrm byte.

#[must_use]pub fn op_count(&self) -> u32[src]

Gets the number of operands

#[must_use]pub fn op0_kind(&self) -> OpCodeOperandKind[src]

Gets operand #0's opkind

#[must_use]pub fn op1_kind(&self) -> OpCodeOperandKind[src]

Gets operand #1's opkind

#[must_use]pub fn op2_kind(&self) -> OpCodeOperandKind[src]

Gets operand #2's opkind

#[must_use]pub fn op3_kind(&self) -> OpCodeOperandKind[src]

Gets operand #3's opkind

#[must_use]pub fn op4_kind(&self) -> OpCodeOperandKind[src]

Gets operand #4's opkind

#[must_use]pub fn op_kind(&self, operand: u32) -> OpCodeOperandKind[src]

Gets an operand's opkind

Panics

Panics if operand is invalid

Arguments

  • operand: Operand number, 0-4

#[must_use]pub fn is_available_in_mode(&self, bitness: u32) -> bool[src]

Checks if the instruction is available in 16-bit mode, 32-bit mode or 64-bit mode

Panics

Panics if bitness is not one of 16, 32, 64.

Arguments

  • bitness: 16, 32 or 64

#[must_use]pub fn op_code_string(&self) -> &str[src]

Gets the opcode string, eg. VEX.128.66.0F38.W0 78 /r, see also instruction_string()

Examples

use iced_x86::*;

let op_code = Code::EVEX_Vmovapd_ymm_k1z_ymmm256.op_code();
assert_eq!("EVEX.256.66.0F.W1 28 /r", op_code.op_code_string());

#[must_use]pub fn instruction_string(&self) -> &str[src]

Gets the instruction string, eg. VPBROADCASTB xmm1, xmm2/m8, see also op_code_string()

Examples

use iced_x86::*;

let op_code = Code::EVEX_Vmovapd_ymm_k1z_ymmm256.op_code();
assert_eq!("VMOVAPD ymm1 {k1}{z}, ymm2/m256", op_code.instruction_string());

Trait Implementations

impl Clone for OpCodeInfo[src]

impl Debug for OpCodeInfo[src]

impl Display for OpCodeInfo[src]

Auto Trait Implementations

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
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impl<T> Borrow<T> for T where
    T: ?Sized
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impl<T> BorrowMut<T> for T where
    T: ?Sized
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impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T> ToOwned for T where
    T: Clone
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type Owned = T

The resulting type after obtaining ownership.

impl<T> ToString for T where
    T: Display + ?Sized
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impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
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type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.