[][src]Enum iced_x86::OpCodeOperandKind

#[non_exhaustive]pub enum OpCodeOperandKind {
    None,
    farbr2_2,
    farbr4_2,
    mem_offs,
    mem,
    mem_mpx,
    mem_mib,
    mem_vsib32x,
    mem_vsib64x,
    mem_vsib32y,
    mem_vsib64y,
    mem_vsib32z,
    mem_vsib64z,
    r8_or_mem,
    r16_or_mem,
    r32_or_mem,
    r32_or_mem_mpx,
    r64_or_mem,
    r64_or_mem_mpx,
    mm_or_mem,
    xmm_or_mem,
    ymm_or_mem,
    zmm_or_mem,
    bnd_or_mem_mpx,
    k_or_mem,
    r8_reg,
    r8_opcode,
    r16_reg,
    r16_reg_mem,
    r16_rm,
    r16_opcode,
    r32_reg,
    r32_reg_mem,
    r32_rm,
    r32_opcode,
    r32_vvvv,
    r64_reg,
    r64_reg_mem,
    r64_rm,
    r64_opcode,
    r64_vvvv,
    seg_reg,
    k_reg,
    kp1_reg,
    k_rm,
    k_vvvv,
    mm_reg,
    mm_rm,
    xmm_reg,
    xmm_rm,
    xmm_vvvv,
    xmmp3_vvvv,
    xmm_is4,
    xmm_is5,
    ymm_reg,
    ymm_rm,
    ymm_vvvv,
    ymm_is4,
    ymm_is5,
    zmm_reg,
    zmm_rm,
    zmm_vvvv,
    zmmp3_vvvv,
    cr_reg,
    dr_reg,
    tr_reg,
    bnd_reg,
    es,
    cs,
    ss,
    ds,
    fs,
    gs,
    al,
    cl,
    ax,
    dx,
    eax,
    rax,
    st0,
    sti_opcode,
    imm2_m2z,
    imm8,
    imm8_const_1,
    imm8sex16,
    imm8sex32,
    imm8sex64,
    imm16,
    imm32,
    imm32sex64,
    imm64,
    seg_rSI,
    es_rDI,
    seg_rDI,
    seg_rBX_al,
    br16_1,
    br32_1,
    br64_1,
    br16_2,
    br32_4,
    br64_4,
    xbegin_2,
    xbegin_4,
    brdisp_2,
    brdisp_4,
}

Operand kind

Variants (Non-exhaustive)

Non-exhaustive enums could have additional variants added in future. Therefore, when matching against variants of non-exhaustive enums, an extra wildcard arm must be added to account for any future variants.
None

No operand

farbr2_2

Far branch 16-bit offset, 16-bit segment/selector

farbr4_2

Far branch 32-bit offset, 16-bit segment/selector

mem_offs

Memory offset without a modrm byte (eg. MOV AL,[offset])

mem

Memory (modrm)

mem_mpx

Memory (modrm), MPX:

16/32-bit mode: must be 32-bit addressing

64-bit mode: 64-bit addressing is forced

mem_mib

Memory (modrm), MPX:

16/32-bit mode: must be 32-bit addressing

64-bit mode: 64-bit addressing is forced and must not be RIP relative

mem_vsib32x

Memory (modrm), vsib32, xmm registers

mem_vsib64x

Memory (modrm), vsib64, xmm registers

mem_vsib32y

Memory (modrm), vsib32, ymm registers

mem_vsib64y

Memory (modrm), vsib64, ymm registers

mem_vsib32z

Memory (modrm), vsib32, zmm registers

mem_vsib64z

Memory (modrm), vsib64, zmm registers

r8_or_mem

8-bit GPR or memory

r16_or_mem

16-bit GPR or memory

r32_or_mem

32-bit GPR or memory

r32_or_mem_mpx

32-bit GPR or memory, MPX: 16/32-bit mode: must be 32-bit addressing, 64-bit mode: 64-bit addressing is forced

r64_or_mem

64-bit GPR or memory

r64_or_mem_mpx

64-bit GPR or memory, MPX: 16/32-bit mode: must be 32-bit addressing, 64-bit mode: 64-bit addressing is forced

mm_or_mem

MM register or memory

xmm_or_mem

XMM register or memory

ymm_or_mem

YMM register or memory

zmm_or_mem

ZMM register or memory

bnd_or_mem_mpx

BND register or memory, MPX: 16/32-bit mode: must be 32-bit addressing, 64-bit mode: 64-bit addressing is forced

k_or_mem

K register or memory

r8_reg

8-bit GPR encoded in the reg field of the modrm byte

r8_opcode

8-bit GPR encoded in the low 3 bits of the opcode

r16_reg

16-bit GPR encoded in the reg field of the modrm byte

r16_reg_mem

16-bit GPR encoded in the reg field of the modrm byte. This is a memory operand and it uses the address size prefix (67h) not the operand size prefix (66h).

r16_rm

16-bit GPR encoded in the mod + r/m fields of the modrm byte

r16_opcode

16-bit GPR encoded in the low 3 bits of the opcode

r32_reg

32-bit GPR encoded in the reg field of the modrm byte

r32_reg_mem

32-bit GPR encoded in the reg field of the modrm byte. This is a memory operand and it uses the address size prefix (67h) not the operand size prefix (66h).

r32_rm

32-bit GPR encoded in the mod + r/m fields of the modrm byte

r32_opcode

32-bit GPR encoded in the low 3 bits of the opcode

r32_vvvv

32-bit GPR encoded in the the V'vvvv field (VEX/EVEX/XOP)

r64_reg

64-bit GPR encoded in the reg field of the modrm byte

r64_reg_mem

64-bit GPR encoded in the reg field of the modrm byte. This is a memory operand and it uses the address size prefix (67h) not the operand size prefix (66h).

r64_rm

64-bit GPR encoded in the mod + r/m fields of the modrm byte

r64_opcode

64-bit GPR encoded in the low 3 bits of the opcode

r64_vvvv

64-bit GPR encoded in the the V'vvvv field (VEX/EVEX/XOP)

seg_reg

Segment register encoded in the reg field of the modrm byte

k_reg

K register encoded in the reg field of the modrm byte

kp1_reg

K register (+1) encoded in the reg field of the modrm byte

k_rm

K register encoded in the mod + r/m fields of the modrm byte

k_vvvv

K register encoded in the the V'vvvv field (VEX/EVEX/XOP)

mm_reg

MM register encoded in the reg field of the modrm byte

mm_rm

MM register encoded in the mod + r/m fields of the modrm byte

xmm_reg

XMM register encoded in the reg field of the modrm byte

xmm_rm

XMM register encoded in the mod + r/m fields of the modrm byte

xmm_vvvv

XMM register encoded in the the V'vvvv field (VEX/EVEX/XOP)

xmmp3_vvvv

XMM register (+3) encoded in the the V'vvvv field (VEX/EVEX/XOP)

xmm_is4

XMM register encoded in the the high 4 bits of the last 8-bit immediate (VEX/XOP only so only XMM0-XMM15)

xmm_is5

XMM register encoded in the the high 4 bits of the last 8-bit immediate (VEX/XOP only so only XMM0-XMM15)

ymm_reg

YMM register encoded in the reg field of the modrm byte

ymm_rm

YMM register encoded in the mod + r/m fields of the modrm byte

ymm_vvvv

YMM register encoded in the the V'vvvv field (VEX/EVEX/XOP)

ymm_is4

YMM register encoded in the the high 4 bits of the last 8-bit immediate (VEX/XOP only so only YMM0-YMM15)

ymm_is5

YMM register encoded in the the high 4 bits of the last 8-bit immediate (VEX/XOP only so only YMM0-YMM15)

zmm_reg

ZMM register encoded in the reg field of the modrm byte

zmm_rm

ZMM register encoded in the mod + r/m fields of the modrm byte

zmm_vvvv

ZMM register encoded in the the V'vvvv field (VEX/EVEX/XOP)

zmmp3_vvvv

ZMM register (+3) encoded in the the V'vvvv field (VEX/EVEX/XOP)

cr_reg

CR register encoded in the reg field of the modrm byte

dr_reg

DR register encoded in the reg field of the modrm byte

tr_reg

TR register encoded in the reg field of the modrm byte

bnd_reg

BND register encoded in the reg field of the modrm byte

es

ES register

cs

CS register

ss

SS register

ds

DS register

fs

FS register

gs

GS register

al

AL register

cl

CL register

ax

AX register

dx

DX register

eax

EAX register

rax

RAX register

st0

ST0 register

sti_opcode

ST(i) register encoded in the low 3 bits of the opcode

imm2_m2z

2-bit immediate (m2z field, low 2 bits of the /is5 immediate, eg. VPERMIL2PS)

imm8

8-bit immediate

imm8_const_1

Constant 1 (8-bit immediate)

imm8sex16

8-bit immediate sign extended to 16 bits

imm8sex32

8-bit immediate sign extended to 32 bits

imm8sex64

8-bit immediate sign extended to 64 bits

imm16

16-bit immediate

imm32

32-bit immediate

imm32sex64

32-bit immediate sign extended to 64 bits

imm64

64-bit immediate

seg_rSI

seg:[rSI] memory operand (string instructions)

es_rDI

es:[rDI] memory operand (string instructions)

seg_rDI

seg:[rDI] memory operand ((V)MASKMOVQ instructions)

seg_rBX_al

seg:[rBX+al] memory operand (XLATB instruction)

br16_1

16-bit branch, 1-byte signed relative offset

br32_1

32-bit branch, 1-byte signed relative offset

br64_1

64-bit branch, 1-byte signed relative offset

br16_2

16-bit branch, 2-byte signed relative offset

br32_4

32-bit branch, 4-byte signed relative offset

br64_4

64-bit branch, 4-byte signed relative offset

xbegin_2

XBEGIN, 2-byte signed relative offset

xbegin_4

XBEGIN, 4-byte signed relative offset

brdisp_2

2-byte branch offset (JMPE instruction)

brdisp_4

4-byte branch offset (JMPE instruction)

Trait Implementations

impl Clone for OpCodeOperandKind[src]

impl Copy for OpCodeOperandKind[src]

impl Debug for OpCodeOperandKind[src]

impl Default for OpCodeOperandKind[src]

impl Eq for OpCodeOperandKind[src]

impl Hash for OpCodeOperandKind[src]

impl Ord for OpCodeOperandKind[src]

impl PartialEq<OpCodeOperandKind> for OpCodeOperandKind[src]

impl PartialOrd<OpCodeOperandKind> for OpCodeOperandKind[src]

impl StructuralEq for OpCodeOperandKind[src]

impl StructuralPartialEq for OpCodeOperandKind[src]

Auto Trait Implementations

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T> ToOwned for T where
    T: Clone
[src]

type Owned = T

The resulting type after obtaining ownership.

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.