Enum iced_x86::Register

#[non_exhaustive]
pub enum Register {
    None,
    AL,
    CL,
    DL,
    BL,
    AH,
    CH,
    DH,
    BH,
    SPL,
    BPL,
    SIL,
    DIL,
    R8L,
    R9L,
    R10L,
    R11L,
    R12L,
    R13L,
    R14L,
    R15L,
    AX,
    CX,
    DX,
    BX,
    SP,
    BP,
    SI,
    DI,
    R8W,
    R9W,
    R10W,
    R11W,
    R12W,
    R13W,
    R14W,
    R15W,
    EAX,
    ECX,
    EDX,
    EBX,
    ESP,
    EBP,
    ESI,
    EDI,
    R8D,
    R9D,
    R10D,
    R11D,
    R12D,
    R13D,
    R14D,
    R15D,
    RAX,
    RCX,
    RDX,
    RBX,
    RSP,
    RBP,
    RSI,
    RDI,
    R8,
    R9,
    R10,
    R11,
    R12,
    R13,
    R14,
    R15,
    EIP,
    RIP,
    ES,
    CS,
    SS,
    DS,
    FS,
    GS,
    XMM0,
    XMM1,
    XMM2,
    XMM3,
    XMM4,
    XMM5,
    XMM6,
    XMM7,
    XMM8,
    XMM9,
    XMM10,
    XMM11,
    XMM12,
    XMM13,
    XMM14,
    XMM15,
    XMM16,
    XMM17,
    XMM18,
    XMM19,
    XMM20,
    XMM21,
    XMM22,
    XMM23,
    XMM24,
    XMM25,
    XMM26,
    XMM27,
    XMM28,
    XMM29,
    XMM30,
    XMM31,
    YMM0,
    YMM1,
    YMM2,
    YMM3,
    YMM4,
    YMM5,
    YMM6,
    YMM7,
    YMM8,
    YMM9,
    YMM10,
    YMM11,
    YMM12,
    YMM13,
    YMM14,
    YMM15,
    YMM16,
    YMM17,
    YMM18,
    YMM19,
    YMM20,
    YMM21,
    YMM22,
    YMM23,
    YMM24,
    YMM25,
    YMM26,
    YMM27,
    YMM28,
    YMM29,
    YMM30,
    YMM31,
    ZMM0,
    ZMM1,
    ZMM2,
    ZMM3,
    ZMM4,
    ZMM5,
    ZMM6,
    ZMM7,
    ZMM8,
    ZMM9,
    ZMM10,
    ZMM11,
    ZMM12,
    ZMM13,
    ZMM14,
    ZMM15,
    ZMM16,
    ZMM17,
    ZMM18,
    ZMM19,
    ZMM20,
    ZMM21,
    ZMM22,
    ZMM23,
    ZMM24,
    ZMM25,
    ZMM26,
    ZMM27,
    ZMM28,
    ZMM29,
    ZMM30,
    ZMM31,
    K0,
    K1,
    K2,
    K3,
    K4,
    K5,
    K6,
    K7,
    BND0,
    BND1,
    BND2,
    BND3,
    CR0,
    CR1,
    CR2,
    CR3,
    CR4,
    CR5,
    CR6,
    CR7,
    CR8,
    CR9,
    CR10,
    CR11,
    CR12,
    CR13,
    CR14,
    CR15,
    DR0,
    DR1,
    DR2,
    DR3,
    DR4,
    DR5,
    DR6,
    DR7,
    DR8,
    DR9,
    DR10,
    DR11,
    DR12,
    DR13,
    DR14,
    DR15,
    ST0,
    ST1,
    ST2,
    ST3,
    ST4,
    ST5,
    ST6,
    ST7,
    MM0,
    MM1,
    MM2,
    MM3,
    MM4,
    MM5,
    MM6,
    MM7,
    TR0,
    TR1,
    TR2,
    TR3,
    TR4,
    TR5,
    TR6,
    TR7,
}

A register

Variants (Non-exhaustive)

Non-exhaustive enums could have additional variants added in future. Therefore, when matching against variants of non-exhaustive enums, an extra wildcard arm must be added to account for any future variants.

None

AL

CL

DL

BL

AH

CH

DH

BH

SPL

BPL

SIL

DIL

R8L

R9L

R10L

R11L

R12L

R13L

R14L

R15L

AX

CX

DX

BX

SP

BP

SI

DI

R8W

R9W

R10W

R11W

R12W

R13W

R14W

R15W

EAX

ECX

EDX

EBX

ESP

EBP

ESI

EDI

R8D

R9D

R10D

R11D

R12D

R13D

R14D

R15D

RAX

RCX

RDX

RBX

RSP

RBP

RSI

RDI

R8

R9

R10

R11

R12

R13

R14

R15

EIP

RIP

ES

CS

SS

DS

FS

GS

XMM0

XMM1

XMM2

XMM3

XMM4

XMM5

XMM6

XMM7

XMM8

XMM9

XMM10

XMM11

XMM12

XMM13

XMM14

XMM15

XMM16

XMM17

XMM18

XMM19

XMM20

XMM21

XMM22

XMM23

XMM24

XMM25

XMM26

XMM27

XMM28

XMM29

XMM30

XMM31

YMM0

YMM1

YMM2

YMM3

YMM4

YMM5

YMM6

YMM7

YMM8

YMM9

YMM10

YMM11

YMM12

YMM13

YMM14

YMM15

YMM16

YMM17

YMM18

YMM19

YMM20

YMM21

YMM22

YMM23

YMM24

YMM25

YMM26

YMM27

YMM28

YMM29

YMM30

YMM31

ZMM0

ZMM1

ZMM2

ZMM3

ZMM4

ZMM5

ZMM6

ZMM7

ZMM8

ZMM9

ZMM10

ZMM11

ZMM12

ZMM13

ZMM14

ZMM15

ZMM16

ZMM17

ZMM18

ZMM19

ZMM20

ZMM21

ZMM22

ZMM23

ZMM24

ZMM25

ZMM26

ZMM27

ZMM28

ZMM29

ZMM30

ZMM31

K0

K1

K2

K3

K4

K5

K6

K7

BND0

BND1

BND2

BND3

CR0

CR1

CR2

CR3

CR4

CR5

CR6

CR7

CR8

CR9

CR10

CR11

CR12

CR13

CR14

CR15

DR0

DR1

DR2

DR3

DR4

DR5

DR6

DR7

DR8

DR9

DR10

DR11

DR12

DR13

DR14

DR15

ST0

ST1

ST2

ST3

ST4

ST5

ST6

ST7

MM0

MM1

MM2

MM3

MM4

MM5

MM6

MM7

TR0

TR1

TR2

TR3

TR4

TR5

TR6

TR7

Methods

impl Register

#[must_use] pub fn info(self) -> &'static RegisterInfo

Gets register info

Examples

use iced_x86::*;
let info = Register::EAX.info();
assert_eq!(4, info.size());

#[must_use] pub fn base(self) -> Self

Gets the base register, eg. AL, AX, EAX, RAX, MM0, XMM0, YMM0, ZMM0, ES

Examples

use iced_x86::*;
assert_eq!(Register::ES, Register::GS.base());
assert_eq!(Register::AL, Register::SIL.base());
assert_eq!(Register::AX, Register::SP.base());
assert_eq!(Register::EAX, Register::R13D.base());
assert_eq!(Register::RAX, Register::RBP.base());
assert_eq!(Register::MM0, Register::MM6.base());
assert_eq!(Register::XMM0, Register::XMM28.base());
assert_eq!(Register::YMM0, Register::YMM12.base());
assert_eq!(Register::ZMM0, Register::ZMM31.base());
assert_eq!(Register::K0, Register::K3.base());
assert_eq!(Register::BND0, Register::BND1.base());
assert_eq!(Register::ST0, Register::ST7.base());
assert_eq!(Register::CR0, Register::CR8.base());
assert_eq!(Register::DR0, Register::DR6.base());
assert_eq!(Register::TR0, Register::TR3.base());
assert_eq!(Register::EIP, Register::RIP.base());

#[must_use] pub fn number(self) -> usize

The register number (index) relative to base(), eg. 0-15, or 0-31, or if 8-bit GPR, 0-19

Examples

use iced_x86::*;
assert_eq!(5, Register::GS.number());
assert_eq!(10, Register::SIL.number());
assert_eq!(4, Register::SP.number());
assert_eq!(13, Register::R13D.number());
assert_eq!(5, Register::RBP.number());
assert_eq!(6, Register::MM6.number());
assert_eq!(28, Register::XMM28.number());
assert_eq!(12, Register::YMM12.number());
assert_eq!(31, Register::ZMM31.number());
assert_eq!(3, Register::K3.number());
assert_eq!(1, Register::BND1.number());
assert_eq!(7, Register::ST7.number());
assert_eq!(8, Register::CR8.number());
assert_eq!(6, Register::DR6.number());
assert_eq!(3, Register::TR3.number());
assert_eq!(1, Register::RIP.number());

#[must_use] pub fn full_register(self) -> Self

Gets the full register that this one is a part of, eg. CL/CH/CX/ECX/RCX -> RCX, XMM11/YMM11/ZMM11 -> ZMM11

Examples

use iced_x86::*;
assert_eq!(Register::GS, Register::GS.full_register());
assert_eq!(Register::RSI, Register::SIL.full_register());
assert_eq!(Register::RSP, Register::SP.full_register());
assert_eq!(Register::R13, Register::R13D.full_register());
assert_eq!(Register::RBP, Register::RBP.full_register());
assert_eq!(Register::MM6, Register::MM6.full_register());
assert_eq!(Register::ZMM10, Register::XMM10.full_register());
assert_eq!(Register::ZMM10, Register::YMM10.full_register());
assert_eq!(Register::ZMM10, Register::ZMM10.full_register());
assert_eq!(Register::K3, Register::K3.full_register());
assert_eq!(Register::BND1, Register::BND1.full_register());
assert_eq!(Register::ST7, Register::ST7.full_register());
assert_eq!(Register::CR8, Register::CR8.full_register());
assert_eq!(Register::DR6, Register::DR6.full_register());
assert_eq!(Register::TR3, Register::TR3.full_register());
assert_eq!(Register::RIP, Register::RIP.full_register());

#[must_use] pub fn full_register32(self) -> Self

Gets the full register that this one is a part of, except if it's a GPR in which case the 32-bit register is returned, eg. CL/CH/CX/ECX/RCX -> ECX, XMM11/YMM11/ZMM11 -> ZMM11

Examples

use iced_x86::*;
assert_eq!(Register::GS, Register::GS.full_register32());
assert_eq!(Register::ESI, Register::SIL.full_register32());
assert_eq!(Register::ESP, Register::SP.full_register32());
assert_eq!(Register::R13D, Register::R13D.full_register32());
assert_eq!(Register::EBP, Register::RBP.full_register32());
assert_eq!(Register::MM6, Register::MM6.full_register32());
assert_eq!(Register::ZMM10, Register::XMM10.full_register32());
assert_eq!(Register::ZMM10, Register::YMM10.full_register32());
assert_eq!(Register::ZMM10, Register::ZMM10.full_register32());
assert_eq!(Register::K3, Register::K3.full_register32());
assert_eq!(Register::BND1, Register::BND1.full_register32());
assert_eq!(Register::ST7, Register::ST7.full_register32());
assert_eq!(Register::CR8, Register::CR8.full_register32());
assert_eq!(Register::DR6, Register::DR6.full_register32());
assert_eq!(Register::TR3, Register::TR3.full_register32());
assert_eq!(Register::RIP, Register::RIP.full_register32());

#[must_use] pub fn size(self) -> usize

Gets the size of the register in bytes

Examples

use iced_x86::*;
assert_eq!(2, Register::GS.size());
assert_eq!(1, Register::SIL.size());
assert_eq!(2, Register::SP.size());
assert_eq!(4, Register::R13D.size());
assert_eq!(8, Register::RBP.size());
assert_eq!(8, Register::MM6.size());
assert_eq!(16, Register::XMM10.size());
assert_eq!(32, Register::YMM10.size());
assert_eq!(64, Register::ZMM10.size());
assert_eq!(8, Register::K3.size());
assert_eq!(16, Register::BND1.size());
assert_eq!(10, Register::ST7.size());
assert_eq!(8, Register::CR8.size());
assert_eq!(8, Register::DR6.size());
assert_eq!(4, Register::TR3.size());
assert_eq!(8, Register::RIP.size());

impl Register

#[must_use] pub fn is_segment_register(self) -> bool

Checks if it's a segment register (ES, CS, SS, DS, FS, GS)

Examples

use iced_x86::*;
assert!(Register::GS.is_segment_register());
assert!(!Register::RCX.is_segment_register());

#[must_use] pub fn is_gpr(self) -> bool

Checks if it's a general purpose register (AL-R15L, AX-R15W, EAX-R15D, RAX-R15)

Examples

use iced_x86::*;
assert!(!Register::GS.is_gpr());
assert!(Register::CH.is_gpr());
assert!(Register::DX.is_gpr());
assert!(Register::R13D.is_gpr());
assert!(Register::RSP.is_gpr());
assert!(!Register::XMM0.is_gpr());

#[must_use] pub fn is_gpr8(self) -> bool

Checks if it's an 8-bit general purpose register (AL-R15L)

Examples

use iced_x86::*;
assert!(!Register::GS.is_gpr8());
assert!(Register::CH.is_gpr8());
assert!(!Register::DX.is_gpr8());
assert!(!Register::R13D.is_gpr8());
assert!(!Register::RSP.is_gpr8());
assert!(!Register::XMM0.is_gpr8());

#[must_use] pub fn is_gpr16(self) -> bool

Checks if it's a 16-bit general purpose register (AX-R15W)

Examples

use iced_x86::*;
assert!(!Register::GS.is_gpr16());
assert!(!Register::CH.is_gpr16());
assert!(Register::DX.is_gpr16());
assert!(!Register::R13D.is_gpr16());
assert!(!Register::RSP.is_gpr16());
assert!(!Register::XMM0.is_gpr16());

#[must_use] pub fn is_gpr32(self) -> bool

Checks if it's a 32-bit general purpose register (EAX-R15D)

Examples

use iced_x86::*;
assert!(!Register::GS.is_gpr32());
assert!(!Register::CH.is_gpr32());
assert!(!Register::DX.is_gpr32());
assert!(Register::R13D.is_gpr32());
assert!(!Register::RSP.is_gpr32());
assert!(!Register::XMM0.is_gpr32());

#[must_use] pub fn is_gpr64(self) -> bool

Checks if it's a 64-bit general purpose register (RAX-R15)

Examples

use iced_x86::*;
assert!(!Register::GS.is_gpr64());
assert!(!Register::CH.is_gpr64());
assert!(!Register::DX.is_gpr64());
assert!(!Register::R13D.is_gpr64());
assert!(Register::RSP.is_gpr64());
assert!(!Register::XMM0.is_gpr64());

#[must_use] pub fn is_xmm(self) -> bool

Checks if it's a 128-bit vector register (XMM0-XMM31)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_xmm());
assert!(!Register::RSP.is_xmm());
assert!(Register::XMM0.is_xmm());
assert!(!Register::YMM0.is_xmm());
assert!(!Register::ZMM0.is_xmm());

#[must_use] pub fn is_ymm(self) -> bool

Checks if it's a 256-bit vector register (YMM0-YMM31)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_ymm());
assert!(!Register::RSP.is_ymm());
assert!(!Register::XMM0.is_ymm());
assert!(Register::YMM0.is_ymm());
assert!(!Register::ZMM0.is_ymm());

#[must_use] pub fn is_zmm(self) -> bool

Checks if it's a 512-bit vector register (ZMM0-ZMM31)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_zmm());
assert!(!Register::RSP.is_zmm());
assert!(!Register::XMM0.is_zmm());
assert!(!Register::YMM0.is_zmm());
assert!(Register::ZMM0.is_zmm());

#[must_use] pub fn is_vector_register(self) -> bool

Checks if it's an XMM, YMM or ZMM register

Examples

use iced_x86::*;
assert!(!Register::R13D.is_vector_register());
assert!(!Register::RSP.is_vector_register());
assert!(Register::XMM0.is_vector_register());
assert!(Register::YMM0.is_vector_register());
assert!(Register::ZMM0.is_vector_register());

#[must_use] pub fn is_ip(self) -> bool

Checks if it's EIP/RIP

Examples

use iced_x86::*;
assert!(Register::EIP.is_ip());
assert!(Register::RIP.is_ip());

#[must_use] pub fn is_k(self) -> bool

Checks if it's an opmask register (K0-K7)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_k());
assert!(Register::K3.is_k());

#[must_use] pub fn is_cr(self) -> bool

Checks if it's a control register (CR0-CR15)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_cr());
assert!(Register::CR3.is_cr());

#[must_use] pub fn is_dr(self) -> bool

Checks if it's a debug register (DR0-DR15)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_dr());
assert!(Register::DR3.is_dr());

#[must_use] pub fn is_tr(self) -> bool

Checks if it's a test register (TR0-TR7)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_tr());
assert!(Register::TR3.is_tr());

#[must_use] pub fn is_st(self) -> bool

Checks if it's an FPU stack register (ST0-ST7)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_st());
assert!(Register::ST3.is_st());

#[must_use] pub fn is_bnd(self) -> bool

Checks if it's a bound register (BND0-BND3)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_bnd());
assert!(Register::BND3.is_bnd());

#[must_use] pub fn is_mm(self) -> bool

Checks if it's an MMX register (MM0-MM7)

Examples

use iced_x86::*;
assert!(!Register::R13D.is_mm());
assert!(Register::MM3.is_mm());

Trait Implementations

impl Add<Register> for i32

type Output = Register

The resulting type after applying the + operator.

#[must_use] fn add(self, rhs: Register) -> Self::Output

Performs the + operation.

impl Add<Register> for u32

type Output = Register

The resulting type after applying the + operator.

#[must_use] fn add(self, rhs: Register) -> Self::Output

Performs the + operation.

impl Add<i32> for Register

type Output = Self

The resulting type after applying the + operator.

#[must_use] fn add(self, rhs: i32) -> Self::Output

Performs the + operation.

impl Add<u32> for Register

type Output = Self

The resulting type after applying the + operator.

#[must_use] fn add(self, rhs: u32) -> Self::Output

Performs the + operation.

impl AddAssign<i32> for Register

fn add_assign(&mut self, rhs: i32)

Performs the += operation.

impl AddAssign<u32> for Register

fn add_assign(&mut self, rhs: u32)

Performs the += operation.

impl Clone for Register

fn clone(&self) -> Register

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for Register

impl Debug for Register

fn fmt<'a>(&self, f: &mut Formatter<'a>) -> Result

Formats the value using the given formatter.

impl Default for Register

#[must_use] fn default() -> Self

Returns the "default value" for a type.

impl Eq for Register

impl Hash for Register

fn hash<__H: Hasher>(&self, state: &mut __H)

Feeds this value into the given [Hasher].

fn hash_slice<H>(data: &[Self], state: &mut H) where
    H: Hasher, 

Feeds a slice of this type into the given [Hasher].

impl Ord for Register

fn cmp(&self, other: &Register) -> Ordering

This method returns an [Ordering] between self and other.

#[must_use] fn max(self, other: Self) -> Self

Compares and returns the maximum of two values.

#[must_use] fn min(self, other: Self) -> Self

Compares and returns the minimum of two values.

#[must_use] fn clamp(self, min: Self, max: Self) -> Self

🔬 This is a nightly-only experimental API. (clamp)

Restrict a value to a certain interval.

impl PartialEq<Register> for Register

fn eq(&self, other: &Register) -> bool

This method tests for self and other values to be equal, and is used by ==.

#[must_use] fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

impl PartialOrd<Register> for Register

fn partial_cmp(&self, other: &Register) -> Option<Ordering>

This method returns an ordering between self and other values if one exists.

#[must_use] fn lt(&self, other: &Rhs) -> bool

This method tests less than (for self and other) and is used by the < operator.

#[must_use] fn le(&self, other: &Rhs) -> bool

This method tests less than or equal to (for self and other) and is used by the <= operator.

#[must_use] fn gt(&self, other: &Rhs) -> bool

This method tests greater than (for self and other) and is used by the > operator.

#[must_use] fn ge(&self, other: &Rhs) -> bool

This method tests greater than or equal to (for self and other) and is used by the >= operator.

impl StructuralEq for Register

impl StructuralPartialEq for Register

impl Sub<i32> for Register

type Output = Self

The resulting type after applying the - operator.

#[must_use] fn sub(self, rhs: i32) -> Self::Output

Performs the - operation.

impl Sub<u32> for Register

type Output = Self

The resulting type after applying the - operator.

#[must_use] fn sub(self, rhs: u32) -> Self::Output

Performs the - operation.

impl SubAssign<i32> for Register

fn sub_assign(&mut self, rhs: i32)

Performs the -= operation.

impl SubAssign<u32> for Register

fn sub_assign(&mut self, rhs: u32)

Performs the -= operation.