Enum gdbstub_arch::arm::reg::id::ArmCoreRegId

#[non_exhaustive]
pub enum ArmCoreRegId {
    Gpr(u8),
    Sp,
    Lr,
    Pc,
    Fpr(u8),
    Fps,
    Cpsr,
}

32-bit ARM core register identifier.

Variants (Non-exhaustive)

Non-exhaustive enums could have additional variants added in future. Therefore, when matching against variants of non-exhaustive enums, an extra wildcard arm must be added to account for any future variants.

Gpr(u8)

General purpose registers (R0-R12)

Sp

Stack Pointer (R13)

Lr

Link Register (R14)

Pc

Program Counter (R15)

Fpr(u8)

Floating point registers (F0-F7)

Fps

Floating point status

Cpsr

Current Program Status Register (cpsr)

Trait Implementations

impl Clone for ArmCoreRegId

fn clone(&self) -> ArmCoreRegId

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for ArmCoreRegId

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl RegId for ArmCoreRegId

fn from_raw_id(id: usize) -> Option<(Self, Option<NonZeroUsize>)>

Map raw GDB register number to a corresponding RegId and optional register size.

impl Copy for ArmCoreRegId