Module gd32vf103_pac::spi0::ctl1

control register 1

Structs

• CTL1_SPEC
  control register 1
• R
  Register CTL1 reader
• W
  Register CTL1 writer

Type Definitions

• DMAREN_R
  Field DMAREN reader - Rx buffer DMA enable
• DMAREN_W
  Field DMAREN writer - Rx buffer DMA enable
• DMATEN_R
  Field DMATEN reader - Transmit Buffer DMA Enable
• DMATEN_W
  Field DMATEN writer - Transmit Buffer DMA Enable
• ERRIE_R
  Field ERRIE reader - Error interrupt enable
• ERRIE_W
  Field ERRIE writer - Error interrupt enable
• NSSDRV_R
  Field NSSDRV reader - Drive NSS Output
• NSSDRV_W
  Field NSSDRV writer - Drive NSS Output
• NSSP_R
  Field NSSP reader - SPI NSS pulse mode enable
• NSSP_W
  Field NSSP writer - SPI NSS pulse mode enable
• RBNEIE_R
  Field RBNEIE reader - RX buffer not empty interrupt enable
• RBNEIE_W
  Field RBNEIE writer - RX buffer not empty interrupt enable
• TBEIE_R
  Field TBEIE reader - Tx buffer empty interrupt enable
• TBEIE_W
  Field TBEIE writer - Tx buffer empty interrupt enable
• TMOD_R
  Field TMOD reader - SPI TI mode enable
• TMOD_W
  Field TMOD writer - SPI TI mode enable