Module gd32vf103_pac::dma1::ch0paddr

source ·
Expand description

Channel 0 peripheral base address register

Structs

  • CH0PADDR_SPEC
    Channel 0 peripheral base address register
  • R
    Register CH0PADDR reader
  • W
    Register CH0PADDR writer

Type Definitions

  • PADDR_R
    Field PADDR reader - Peripheral base address
  • PADDR_W
    Field PADDR writer - Peripheral base address