Module gd32vf103_pac::adc0
source · Expand description
Analog to digital converter
Modules
- control register 0
- control register 1
- Inserted data register 0
- Inserted data register 1
- Inserted data register 2
- Inserted data register 3
- Inserted channel data offset register 0
- Inserted channel data offset register 1
- Inserted channel data offset register 2
- Inserted channel data offset register 3
- Inserted sequence register
- Oversample control register
- regular data register
- regular sequence register 0
- regular sequence register 1
- regular sequence register 2
- Sample time register 0
- Sample time register 1
- status register
- watchdog higher threshold register
- watchdog lower threshold register
Structs
- Register block
Type Definitions
- CTL0 (rw) register accessor: an alias for
Reg<CTL0_SPEC> - CTL1 (rw) register accessor: an alias for
Reg<CTL1_SPEC> - IDATA0 (r) register accessor: an alias for
Reg<IDATA0_SPEC> - IDATA1 (r) register accessor: an alias for
Reg<IDATA1_SPEC> - IDATA2 (r) register accessor: an alias for
Reg<IDATA2_SPEC> - IDATA3 (r) register accessor: an alias for
Reg<IDATA3_SPEC> - IOFF0 (rw) register accessor: an alias for
Reg<IOFF0_SPEC> - IOFF1 (rw) register accessor: an alias for
Reg<IOFF1_SPEC> - IOFF2 (rw) register accessor: an alias for
Reg<IOFF2_SPEC> - IOFF3 (rw) register accessor: an alias for
Reg<IOFF3_SPEC> - ISQ (rw) register accessor: an alias for
Reg<ISQ_SPEC> - OVSAMPCTL (rw) register accessor: an alias for
Reg<OVSAMPCTL_SPEC> - RDATA (r) register accessor: an alias for
Reg<RDATA_SPEC> - RSQ0 (rw) register accessor: an alias for
Reg<RSQ0_SPEC> - RSQ1 (rw) register accessor: an alias for
Reg<RSQ1_SPEC> - RSQ2 (rw) register accessor: an alias for
Reg<RSQ2_SPEC> - SAMPT0 (rw) register accessor: an alias for
Reg<SAMPT0_SPEC> - SAMPT1 (rw) register accessor: an alias for
Reg<SAMPT1_SPEC> - STAT (rw) register accessor: an alias for
Reg<STAT_SPEC> - WDHT (rw) register accessor: an alias for
Reg<WDHT_SPEC> - WDLT (rw) register accessor: an alias for
Reg<WDLT_SPEC>