Module gd32vf103_pac::spi0::ctl0
source · Expand description
control register 0
Structs
- control register 0
- Register
CTL0
reader - Register
CTL0
writer
Type Definitions
- Field
BDEN
reader - Bidirectional enable - Field
BDEN
writer - Bidirectional enable - Field
BDOEN
reader - Bidirectional Transmit output enable - Field
BDOEN
writer - Bidirectional Transmit output enable - Field
CKPH
reader - Clock Phase Selection - Field
CKPH
writer - Clock Phase Selection - Field
CKPL
reader - Clock polarity Selection - Field
CKPL
writer - Clock polarity Selection - Field
CRCEN
reader - CRC Calculation Enable - Field
CRCEN
writer - CRC Calculation Enable - Field
CRCNT
reader - CRC Next Transfer - Field
CRCNT
writer - CRC Next Transfer - Field
FF16
reader - Data frame format - Field
FF16
writer - Data frame format - Field
LF
reader - LSB First Mode - Field
LF
writer - LSB First Mode - Field
MSTMOD
reader - Master Mode Enable - Field
MSTMOD
writer - Master Mode Enable - Field
PSC
reader - Master Clock Prescaler Selection - Field
PSC
writer - Master Clock Prescaler Selection - Field
RO
reader - Receive only - Field
RO
writer - Receive only - Field
SPIEN
reader - SPI enable - Field
SPIEN
writer - SPI enable - Field
SWNSSEN
reader - NSS Software Mode Selection - Field
SWNSSEN
writer - NSS Software Mode Selection - Field
SWNSS
reader - NSS Pin Selection In NSS Software Mode - Field
SWNSS
writer - NSS Pin Selection In NSS Software Mode