[−][src]Type Definition gd32vf103_pac::dma1::ch2ctl::R
type R = R<u32, CH2CTL>;
Reader of register CH2CTL
Implementations
impl R
[src]
pub fn chen(&self) -> CHEN_R
[src]
Bit 0 - Channel enable
pub fn ftfie(&self) -> FTFIE_R
[src]
Bit 1 - Enable bit for channel full transfer finish interrupt
pub fn htfie(&self) -> HTFIE_R
[src]
Bit 2 - Enable bit for channel half transfer finish interrupt
pub fn errie(&self) -> ERRIE_R
[src]
Bit 3 - Enable bit for channel error interrupt
pub fn dir(&self) -> DIR_R
[src]
Bit 4 - Transfer direction
pub fn cmen(&self) -> CMEN_R
[src]
Bit 5 - Circular mode enable
pub fn pnaga(&self) -> PNAGA_R
[src]
Bit 6 - Next address generation algorithm of peripheral
pub fn mnaga(&self) -> MNAGA_R
[src]
Bit 7 - Next address generation algorithm of memory
pub fn pwidth(&self) -> PWIDTH_R
[src]
Bits 8:9 - Transfer data size of peripheral
pub fn mwidth(&self) -> MWIDTH_R
[src]
Bits 10:11 - Transfer data size of memory
pub fn prio(&self) -> PRIO_R
[src]
Bits 12:13 - Priority level
pub fn m2m(&self) -> M2M_R
[src]
Bit 14 - Memory to Memory Mode