[−][src]Type Definition gd32vf103_pac::dma0::CH5PADDR
type CH5PADDR = Reg<u32, _CH5PADDR>;
Channel 5 peripheral base address register
This register you can read
, reset
, write
, write_with_zero
, modify
. See API.
For information about available fields see ch5paddr module
Trait Implementations
impl Readable for CH5PADDR
[src]
read()
method returns ch5paddr::R reader structure
impl ResetValue for CH5PADDR
[src]
Register CH5PADDR reset()
's with value 0
impl Writable for CH5PADDR
[src]
write(|w| ..)
method takes ch5paddr::W writer structure