Type Alias gd32f1::gd32f190::tsi::ctl::W

pub type W = W<CtlSpec>;

Register CTL writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn tsien(&mut self) -> TsienW<'_, CtlSpec>

Bit 0 - TSI enable

pub fn tsis(&mut self) -> TsisW<'_, CtlSpec>

Bit 1 - TSI start

pub fn trgmod(&mut self) -> TrgmodW<'_, CtlSpec>

Bit 2 - Trigger mode selection

pub fn egsel(&mut self) -> EgselW<'_, CtlSpec>

Bit 3 - Edge selection

pub fn pinmod(&mut self) -> PinmodW<'_, CtlSpec>

Bit 4 - Pin mode

pub fn mcn(&mut self) -> McnW<'_, CtlSpec>

Bits 5:7 - Max cycle number of a sequence

pub fn ctcdiv(&mut self) -> CtcdivW<'_, CtlSpec>

Bits 12:14 - CTCLK clock division factor

pub fn ecdiv(&mut self) -> EcdivW<'_, CtlSpec>

Bit 15 - ECCLK clock division factor

pub fn ecen(&mut self) -> EcenW<'_, CtlSpec>

Bit 16 - Extend Charge State Enable

pub fn ecdt(&mut self) -> EcdtW<'_, CtlSpec>

Bits 17:23 - Extend Charge State Maximum Duration Time

pub fn ctdt(&mut self) -> CtdtW<'_, CtlSpec>

Bits 24:27 - Charge Transfer State Duration Time

pub fn cdt(&mut self) -> CdtW<'_, CtlSpec>

Bits 28:31 - Charge State Duration Time