Type Alias gd32f1::gd32f130::spi0::ctl0::W

pub type W = W<Ctl0Spec>;

Register CTL0 writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn ckph(&mut self) -> CkphW<'_, Ctl0Spec>

Bit 0 - Clock Phase Selection

pub fn ckpl(&mut self) -> CkplW<'_, Ctl0Spec>

Bit 1 - Clock Polarity Selection

pub fn mstmod(&mut self) -> MstmodW<'_, Ctl0Spec>

Bit 2 - Master selection

pub fn psc(&mut self) -> PscW<'_, Ctl0Spec>

Bits 3:5 - Master Clock Prescaler Selection

pub fn spien(&mut self) -> SpienW<'_, Ctl0Spec>

Bit 6 - SPI enable

pub fn lf(&mut self) -> LfW<'_, Ctl0Spec>

Bit 7 - LSB First Mode

pub fn swnss(&mut self) -> SwnssW<'_, Ctl0Spec>

Bit 8 - NSS Pin Selection In NSS Software Mode

pub fn swnssen(&mut self) -> SwnssenW<'_, Ctl0Spec>

Bit 9 - NSS Software Mode Selection

pub fn ro(&mut self) -> RoW<'_, Ctl0Spec>

Bit 10 - Receive only

pub fn ff16(&mut self) -> Ff16W<'_, Ctl0Spec>

Bit 11 - Data frame format

pub fn crcnt(&mut self) -> CrcntW<'_, Ctl0Spec>

Bit 12 - CRC transfer next

pub fn crcen(&mut self) -> CrcenW<'_, Ctl0Spec>

Bit 13 - Hardware CRC calculation enable

pub fn bdoen(&mut self) -> BdoenW<'_, Ctl0Spec>

Bit 14 - Bidirectional Transmit output enable

pub fn bden(&mut self) -> BdenW<'_, Ctl0Spec>

Bit 15 - Bidirectional enable