Expand description
GPIO port output data register
Re-exports§
pub use Octl0R as Octl1R;
pub use Octl0R as Octl2R;
pub use Octl0R as Octl3R;
pub use Octl0R as Octl4R;
pub use Octl0R as Octl5R;
pub use Octl0R as Octl6R;
pub use Octl0R as Octl7R;
pub use Octl0R as Octl8R;
pub use Octl0R as Octl9R;
pub use Octl0R as Octl10R;
pub use Octl0R as Octl11R;
pub use Octl0R as Octl12R;
pub use Octl0R as Octl13R;
pub use Octl0R as Octl14R;
pub use Octl0R as Octl15R;
pub use Octl0W as Octl1W;
pub use Octl0W as Octl2W;
pub use Octl0W as Octl3W;
pub use Octl0W as Octl4W;
pub use Octl0W as Octl5W;
pub use Octl0W as Octl6W;
pub use Octl0W as Octl7W;
pub use Octl0W as Octl8W;
pub use Octl0W as Octl9W;
pub use Octl0W as Octl10W;
pub use Octl0W as Octl11W;
pub use Octl0W as Octl12W;
pub use Octl0W as Octl13W;
pub use Octl0W as Octl14W;
pub use Octl0W as Octl15W;
Structs§
- GPIO port output data register
Enums§
- Port output data 0
Type Aliases§
- Field
OCTL0
reader - Port output data 0 - Field
OCTL0
writer - Port output data 0 - Register
OCTL
reader - Register
OCTL
writer