Struct gd32f1::gd32f190::slcd::cfg::R

pub struct R(_);

Register CFG reader

Implementations

impl R

pub fn hden(&self) -> HDEN_R

Bit 0 - High drive enable

pub fn sofie(&self) -> SOFIE_R

Bit 1 - Start of frame interrupt enable

pub fn updie(&self) -> UPDIE_R

Bit 3 - SLCD update done interrupt enable

pub fn pulse(&self) -> PULSE_R

Bits 4:6 - Pulse on duration

pub fn dtd(&self) -> DTD_R

Bits 7:9 - Dead time duration

pub fn conr(&self) -> CONR_R

Bits 10:12 - Contrast ratio

pub fn blkdiv(&self) -> BLKDIV_R

Bits 13:15 - Blink frequency divider

pub fn blkmod(&self) -> BLKMOD_R

Bits 16:17 - Blink mode

pub fn div(&self) -> DIV_R

Bits 18:21 - SLCD clock divider

pub fn psc(&self) -> PSC_R

Bits 22:25 - SLCD clock prescaler

Methods from Deref<Target = R<CFG_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<CFG_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<CFG_SPEC>> for R

fn from(reader: R<CFG_SPEC>) -> Self

Performs the conversion.