1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144
#[doc = "Writer for register SWEVG"] pub type W = crate::W<u16, super::SWEVG>; #[doc = "Register SWEVG `reset()`'s with value 0"] impl crate::ResetValue for super::SWEVG { type Type = u16; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Write proxy for field `BRKG`"] pub struct BRKG_W<'a> { w: &'a mut W, } impl<'a> BRKG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u16) & 0x01) << 7); self.w } } #[doc = "Write proxy for field `CMTG`"] pub struct CMTG_W<'a> { w: &'a mut W, } impl<'a> CMTG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u16) & 0x01) << 5); self.w } } #[doc = "Write proxy for field `CH0G`"] pub struct CH0G_W<'a> { w: &'a mut W, } impl<'a> CH0G_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u16) & 0x01) << 1); self.w } } #[doc = "Update generation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum UPG_AW { #[doc = "1: Re-initializes the timer counter and generates an update of the registers."] UPDATE = 1, } impl From<UPG_AW> for bool { #[inline(always)] fn from(variant: UPG_AW) -> Self { variant as u8 != 0 } } #[doc = "Write proxy for field `UPG`"] pub struct UPG_W<'a> { w: &'a mut W, } impl<'a> UPG_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: UPG_AW) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Re-initializes the timer counter and generates an update of the registers."] #[inline(always)] pub fn update(self) -> &'a mut W { self.variant(UPG_AW::UPDATE) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u16) & 0x01); self.w } } impl W { #[doc = "Bit 7 - Break event generation"] #[inline(always)] pub fn brkg(&mut self) -> BRKG_W { BRKG_W { w: self } } #[doc = "Bit 5 - Channel commutation event generation"] #[inline(always)] pub fn cmtg(&mut self) -> CMTG_W { CMTG_W { w: self } } #[doc = "Bit 1 - Channel 0 capture or compare event generation"] #[inline(always)] pub fn ch0g(&mut self) -> CH0G_W { CH0G_W { w: self } } #[doc = "Bit 0 - Update generation"] #[inline(always)] pub fn upg(&mut self) -> UPG_W { UPG_W { w: self } } }