1
  2
  3
  4
  5
  6
  7
  8
  9
 10
 11
 12
 13
 14
 15
 16
 17
 18
 19
 20
 21
 22
 23
 24
 25
 26
 27
 28
 29
 30
 31
 32
 33
 34
 35
 36
 37
 38
 39
 40
 41
 42
 43
 44
 45
 46
 47
 48
 49
 50
 51
 52
 53
 54
 55
 56
 57
 58
 59
 60
 61
 62
 63
 64
 65
 66
 67
 68
 69
 70
 71
 72
 73
 74
 75
 76
 77
 78
 79
 80
 81
 82
 83
 84
 85
 86
 87
 88
 89
 90
 91
 92
 93
 94
 95
 96
 97
 98
 99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114

#[doc = r"Register block"]
#[repr(C)]
pub struct RegisterBlock {
    #[doc = "0x00 - GPIOF port control register"]
    pub ctl: CTL,
    #[doc = "0x04 - GPIO port output type register"]
    pub omode: OMODE,
    #[doc = "0x08 - GPIO port output speed register"]
    pub ospd: OSPD,
    #[doc = "0x0c - GPIO port pull-up/pull-down register"]
    pub pud: PUD,
    #[doc = "0x10 - GPIO port input data register"]
    pub istat: ISTAT,
    #[doc = "0x14 - GPIO port output data register"]
    pub octl: OCTL,
    #[doc = "0x18 - GPIO port bit set/reset register"]
    pub bop: BOP,
    _reserved7: [u8; 12usize],
    #[doc = "0x28 - Port bit reset register"]
    pub bc: BC,
    #[doc = "0x2c - Port bit toggle register"]
    pub tg: TG,
}
#[doc = "GPIOF port control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl](ctl) module"]
pub type CTL = crate::Reg<u32, _CTL>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _CTL;
#[doc = "`read()` method returns [ctl::R](ctl::R) reader structure"]
impl crate::Readable for CTL {}
#[doc = "`write(|w| ..)` method takes [ctl::W](ctl::W) writer structure"]
impl crate::Writable for CTL {}
#[doc = "GPIOF port control register"]
pub mod ctl;
#[doc = "GPIO port output type register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [omode](omode) module"]
pub type OMODE = crate::Reg<u32, _OMODE>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _OMODE;
#[doc = "`read()` method returns [omode::R](omode::R) reader structure"]
impl crate::Readable for OMODE {}
#[doc = "`write(|w| ..)` method takes [omode::W](omode::W) writer structure"]
impl crate::Writable for OMODE {}
#[doc = "GPIO port output type register"]
pub mod omode;
#[doc = "GPIO port output speed register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ospd](ospd) module"]
pub type OSPD = crate::Reg<u32, _OSPD>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _OSPD;
#[doc = "`read()` method returns [ospd::R](ospd::R) reader structure"]
impl crate::Readable for OSPD {}
#[doc = "`write(|w| ..)` method takes [ospd::W](ospd::W) writer structure"]
impl crate::Writable for OSPD {}
#[doc = "GPIO port output speed register"]
pub mod ospd;
#[doc = "GPIO port pull-up/pull-down register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pud](pud) module"]
pub type PUD = crate::Reg<u32, _PUD>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _PUD;
#[doc = "`read()` method returns [pud::R](pud::R) reader structure"]
impl crate::Readable for PUD {}
#[doc = "`write(|w| ..)` method takes [pud::W](pud::W) writer structure"]
impl crate::Writable for PUD {}
#[doc = "GPIO port pull-up/pull-down register"]
pub mod pud;
#[doc = "GPIO port input data register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [istat](istat) module"]
pub type ISTAT = crate::Reg<u32, _ISTAT>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _ISTAT;
#[doc = "`read()` method returns [istat::R](istat::R) reader structure"]
impl crate::Readable for ISTAT {}
#[doc = "GPIO port input data register"]
pub mod istat;
#[doc = "GPIO port output data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [octl](octl) module"]
pub type OCTL = crate::Reg<u32, _OCTL>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _OCTL;
#[doc = "`read()` method returns [octl::R](octl::R) reader structure"]
impl crate::Readable for OCTL {}
#[doc = "`write(|w| ..)` method takes [octl::W](octl::W) writer structure"]
impl crate::Writable for OCTL {}
#[doc = "GPIO port output data register"]
pub mod octl;
#[doc = "GPIO port bit set/reset register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bop](bop) module"]
pub type BOP = crate::Reg<u32, _BOP>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _BOP;
#[doc = "`write(|w| ..)` method takes [bop::W](bop::W) writer structure"]
impl crate::Writable for BOP {}
#[doc = "GPIO port bit set/reset register"]
pub mod bop;
#[doc = "Port bit reset register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bc](bc) module"]
pub type BC = crate::Reg<u32, _BC>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _BC;
#[doc = "`write(|w| ..)` method takes [bc::W](bc::W) writer structure"]
impl crate::Writable for BC {}
#[doc = "Port bit reset register"]
pub mod bc;
#[doc = "Port bit toggle register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tg](tg) module"]
pub type TG = crate::Reg<u32, _TG>;
#[allow(missing_docs)]
#[doc(hidden)]
pub struct _TG;
#[doc = "`write(|w| ..)` method takes [tg::W](tg::W) writer structure"]
impl crate::Writable for TG {}
#[doc = "Port bit toggle register"]
pub mod tg;