Module gd32f1::gd32f170::timer13::chctl0_output [−][src]
Channel control register 0 (output mode)
Structs
| CH0COMCEN_W | Write proxy for field |
| CH0COMCTL_W | Write proxy for field |
| CH0COMFEN_W | Write proxy for field |
| CH0COMSEN_W | Write proxy for field |
| CH0MS_W | Write proxy for field |
Enums
| CH0COMCEN_A | Channel 0 output compare clear enable |
| CH0COMCTL_A | Channel 0 compare output control |
| CH0COMFEN_A | Channel 0 output compare fast enable |
| CH0COMSEN_A | Channel 0 output compare shadow enable |
| CH0MS_A | Channel 0 mode selection |
Type Definitions
| CH0COMCEN_R | Reader of field |
| CH0COMCTL_R | Reader of field |
| CH0COMFEN_R | Reader of field |
| CH0COMSEN_R | Reader of field |
| CH0MS_R | Reader of field |
| R | Reader of register CHCTL0_Output |
| W | Writer for register CHCTL0_Output |