Module gd32f1::gd32f170::timer1::ctl0 [−][src]
control register 0
Structs
| ARSE_W | Write proxy for field |
| CAM_W | Write proxy for field |
| CEN_W | Write proxy for field |
| CKDIV_W | Write proxy for field |
| DIR_W | Write proxy for field |
| SPM_W | Write proxy for field |
| UPDIS_W | Write proxy for field |
| UPS_W | Write proxy for field |
Enums
| ARSE_A | Auto-reload shadow enable |
| CAM_A | Counter aligns mode selection |
| CEN_A | Counter enable |
| CKDIV_A | Clock division |
| DIR_A | Direction |
| SPM_A | Single pulse mode |
| UPDIS_A | Update disable |
| UPS_A | Update request source |
Type Definitions
| ARSE_R | Reader of field |
| CAM_R | Reader of field |
| CEN_R | Reader of field |
| CKDIV_R | Reader of field |
| DIR_R | Reader of field |
| R | Reader of register CTL0 |
| SPM_R | Reader of field |
| UPDIS_R | Reader of field |
| UPS_R | Reader of field |
| W | Writer for register CTL0 |