Module gd32f1::gd32f170::timer1::chctl0_output[][src]

Channel control register 0 (output mode)

Structs

CH0COMCEN_W

Write proxy for field CH0COMCEN

CH0COMCTL_W

Write proxy for field CH0COMCTL

CH0COMFEN_W

Write proxy for field CH0COMFEN

CH0COMSEN_W

Write proxy for field CH0COMSEN

CH0MS_W

Write proxy for field CH0MS

CH1COMCEN_W

Write proxy for field CH1COMCEN

CH1COMCTL_W

Write proxy for field CH1COMCTL

CH1COMFEN_W

Write proxy for field CH1COMFEN

CH1COMSEN_W

Write proxy for field CH1COMSEN

CH1MS_W

Write proxy for field CH1MS

Enums

CH1COMCEN_A

Channel 1 output compare clear enable

CH1COMCTL_A

Channel 1 output compare mode

CH1COMFEN_A

Channel 1 output compare fast enable

CH1COMSEN_A

Channel 1 output compare shadow enable

CH1MS_A

Channel 1 mode selection

Type Definitions

CH0COMCEN_A

Channel 0 output compare clear enable

CH0COMCEN_R

Reader of field CH0COMCEN

CH0COMCTL_A

Channel 0 compare output control

CH0COMCTL_R

Reader of field CH0COMCTL

CH0COMFEN_A

Channel 0 output compare fast enable

CH0COMFEN_R

Reader of field CH0COMFEN

CH0COMSEN_A

Channel 0 output compare shadow enable

CH0COMSEN_R

Reader of field CH0COMSEN

CH0MS_A

Channel 0 mode selection

CH0MS_R

Reader of field CH0MS

CH1COMCEN_R

Reader of field CH1COMCEN

CH1COMCTL_R

Reader of field CH1COMCTL

CH1COMFEN_R

Reader of field CH1COMFEN

CH1COMSEN_R

Reader of field CH1COMSEN

CH1MS_R

Reader of field CH1MS

R

Reader of register CHCTL0_Output

W

Writer for register CHCTL0_Output