Module gd32f1::gd32f170::rcu [−][src]
Reset and clock unit
Modules
| adden | Additional enable register |
| addrst | Additional reset register |
| ahben | AHB enable register (RCU_AHBEN) |
| ahbrst | AHB reset register |
| apb1en | APB1 enable register (RCU_APB1EN) |
| apb1rst | APB1 reset register (RCU_APB1RST) |
| apb2en | APB2 enable register (RCU_APB2EN) |
| apb2rst | APB2 reset register (RCU_APB2RST) |
| bdctl | Backup domain control register (RCU_BDCTL) |
| cfg0 | Clock configuration register 0 (RCU_CFG0) |
| cfg1 | Configuration register 1 |
| cfg2 | Configuration register 2 |
| cfg3 | Configuration register 4 |
| ctl0 | Control register 0 |
| ctl1 | Control register 1 |
| dsv | Deep-sleep mode voltage register |
| int | Clock interrupt register (RCU_INT) |
| pdvsel | Power down voltage select register |
| rstsck | Reset source /clock register (RCU_RSTSCK) |
| vkey | Voltage key register |
Structs
| RegisterBlock | Register block |
Type Definitions
| ADDEN | Additional enable register |
| ADDRST | Additional reset register |
| AHBEN | AHB enable register (RCU_AHBEN) |
| AHBRST | AHB reset register |
| APB1EN | APB1 enable register (RCU_APB1EN) |
| APB1RST | APB1 reset register (RCU_APB1RST) |
| APB2EN | APB2 enable register (RCU_APB2EN) |
| APB2RST | APB2 reset register (RCU_APB2RST) |
| BDCTL | Backup domain control register (RCU_BDCTL) |
| CFG0 | Clock configuration register 0 (RCU_CFG0) |
| CFG1 | Configuration register 1 |
| CFG2 | Configuration register 2 |
| CFG3 | Configuration register 4 |
| CTL0 | Control register 0 |
| CTL1 | Control register 1 |
| DSV | Deep-sleep mode voltage register |
| INT | Clock interrupt register (RCU_INT) |
| PDVSEL | Power down voltage select register |
| RSTSCK | Reset source /clock register (RCU_RSTSCK) |
| VKEY | Voltage key register |