Type Definition gd32f1::gd32f170::adc::ctl1::R[][src]

type R = R<u32, CTL1>;

Reader of register CTL1

Implementations

impl R[src]

pub fn vbaten(&self) -> VBATEN_R[src]

Bit 24 - enable/disable the VBAT channel

pub fn tsvren(&self) -> TSVREN_R[src]

Bit 23 - Channel 16 and 17 enable of ADC

pub fn swrcst(&self) -> SWRCST_R[src]

Bit 22 - Start on regular channel

pub fn swicst(&self) -> SWICST_R[src]

Bit 21 - Start on inserted channel

pub fn eterc(&self) -> ETERC_R[src]

Bit 20 - External trigger enable for regular channel

pub fn etsrc(&self) -> ETSRC_R[src]

Bits 17:19 - External trigger select for regular channel

pub fn eteic(&self) -> ETEIC_R[src]

Bit 15 - External trigger enable for inserted channel

pub fn etsic(&self) -> ETSIC_R[src]

Bits 12:14 - External trigger select for inserted channel

pub fn dal(&self) -> DAL_R[src]

Bit 11 - Data alignment

pub fn dma(&self) -> DMA_R[src]

Bit 8 - DMA request enable

pub fn rstclb(&self) -> RSTCLB_R[src]

Bit 3 - Reset calibration

pub fn clb(&self) -> CLB_R[src]

Bit 2 - ADC calibration

pub fn ctn(&self) -> CTN_R[src]

Bit 1 - Continuous mode

pub fn adcon(&self) -> ADCON_R[src]

Bit 0 - ADC ON