Module gd32f1::gd32f130::timer0::cchp[−][src]

channel complementary protection register

Structs

BRKEN_W	Write proxy for field `BRKEN`
BRKP_W	Write proxy for field `BRKP`
DTCFG_W	Write proxy for field `DTCFG`
IOS_W	Write proxy for field `IOS`
OAEN_W	Write proxy for field `OAEN`
POEN_W	Write proxy for field `POEN`
PROT_W	Write proxy for field `PROT`
ROS_W	Write proxy for field `ROS`

Enums

BRKEN_A	Break enable
BRKP_A	Break polarity
IOS_A	Idle mode off-state configure
OAEN_A	Output automatic enable
POEN_A	Primary output enable
PROT_A	Complementary register protect control
ROS_A	Run mode off-state configure

Type Definitions

BRKEN_R	Reader of field `BRKEN`
BRKP_R	Reader of field `BRKP`
DTCFG_R	Reader of field `DTCFG`
IOS_R	Reader of field `IOS`
OAEN_R	Reader of field `OAEN`
POEN_R	Reader of field `POEN`
PROT_R	Reader of field `PROT`
R	Reader of register CCHP
ROS_R	Reader of field `ROS`
W	Writer for register CCHP