Module gba::dma

source · []
Expand description

Module for interfacing with the GBA’s Direct Memory Access units.

The GBA has four DMA units, numbered from 0 to 3. They can be used for extremely efficient memory transfers, and they can also be set to automatically transfer in response to select events.

Whenever a DMA unit is active, the CPU does not operate at all. Not even hardware interrupts will occur while a DMA is running. The interrupt will instead happen after the DMA transfer is done. When it’s critical that an interrupt be handled exactly on time (such as when using serial interrupts) then you should avoid any large DMA transfers.

In any situation when more than one DMA unit would be active at the same time, the lower-numbered DMA unit runs first.

Each DMA unit is controlled by 4 different MMIO addresses, as follows (replace x with the DMA unit’s number):

  • DMAx_SRC and DMAx_DEST: source and destination address. DMA 0 can only use internal memory, DMA 1 and 2 can read from the gamepak but not write to it, and DMA 3 can even write to the gamepak (when the gamepak itself supports that). In all cases, SRAM cannot be accessed. The addresses of a transfer should always be aliged to the element size.
  • DMAx_COUNT: Number of elements to transfer. The number of elements is either a 14-bit (DMA 0/1/2) or 16-bit (DMA3) number. If the count is set to 0 then the transfer will instead copy one more than the normal maximum of that number’s range (DMA 0/1/2: 16_384, DMA 3: 65_536).
  • DMAx_CONTROL: Configuration bits for the transfer, see DmaControl.

Safety

The DMA units are the least safe part of the GBA and should be used with caution.

Because Rust doesn’t have a fully precise memory model, and because LLVM is a little fuzzy about the limits of what a volatile address access can do, you are advised to not use DMA to alter any memory that is part of Rust’s compilation (stack variables, static variables, etc).

You are advised to only use the DMA units to transfer data into VRAM, PALRAM, OAM, and MMIO controls (eg: the FIFO sound buffers).

In the future the situation may improve.

Structs

DMA control configuration.

Enums

Sets the change in destination address after each transfer.
When the DMA unit should start doing work.
Sets the change in source address after each transfer.