Enum ftdi_mpsse::ClockBitsIn
source · [−]#[repr(u8)]
pub enum ClockBitsIn {
MsbPos,
MsbNeg,
LsbPos,
LsbNeg,
}
Expand description
Modes for clocking data bits into the FTDI device.
This is an argument to the clock_bits_in
method.
Variants
MsbPos
Positive clock edge MSB first.
The data will be shifted up so that the first bit in may not be in bit 7 but from 6 downwards depending on the number of bits to shift (i.e. a length of 1 bit will have the data bit sampled in bit 0 of the byte sent back to the PC).
The data will be sampled on the rising edge of the CLK pin.
MsbNeg
Negative clock edge MSB first.
The data will be shifted up so that the first bit in may not be in bit 7 but from 6 downwards depending on the number of bits to shift (i.e. a length of 1 bit will have the data bit sampled in bit 0 of the byte sent back to the PC).
The data will be sampled on the falling edge of the CLK pin.
LsbPos
Positive clock edge LSB first.
The data will be shifted down so that the first bit in may not be in bit 0 but from 1 upwards depending on the number of bits to shift (i.e. a length of 1 bit will have the data bit sampled in bit 7 of the byte sent back to the PC).
The data will be sampled on the rising edge of the CLK pin.
LsbNeg
Negative clock edge LSB first.
The data will be shifted down so that the first bit in may not be in bit 0 but from 1 upwards depending on the number of bits to shift (i.e. a length of 1 bit will have the data bit sampled in bit 7 of the byte sent back to the PC).
The data will be sampled on the falling edge of the CLK pin.
Trait Implementations
Performs the conversion.
Auto Trait Implementations
impl RefUnwindSafe for ClockBitsIn
impl Send for ClockBitsIn
impl Sync for ClockBitsIn
impl Unpin for ClockBitsIn
impl UnwindSafe for ClockBitsIn
Blanket Implementations
Mutably borrows from an owned value. Read more