Module fomu_pac::lxspi

LXSPI

Modules

bitbang	Bitbang controls for SPI output. Only standard 1x SPI is supported, meaning the IO2 and IO3 lines will be hardwired to 1 during bitbang mode.
bitbang_en	Write a 1 here to disable memory-mapped mode and enable bitbang mode.
miso	Incoming value of MISO signal.

Structs

RegisterBlock

Register block

Type Definitions

BITBANG	Bitbang controls for SPI output. Only standard 1x SPI is supported, meaning the IO2 and IO3 lines will be hardwired to 1 during bitbang mode.
BITBANG_EN	Write a 1 here to disable memory-mapped mode and enable bitbang mode.
MISO	Incoming value of MISO signal.