Struct flipper0::ffi::TIM_TypeDef

pub struct TIM_TypeDef {

    pub CR1: u32,
    pub CR2: u32,
    pub SMCR: u32,
    pub DIER: u32,
    pub SR: u32,
    pub EGR: u32,
    pub CCMR1: u32,
    pub CCMR2: u32,
    pub CCER: u32,
    pub CNT: u32,
    pub PSC: u32,
    pub ARR: u32,
    pub RCR: u32,
    pub CCR1: u32,
    pub CCR2: u32,
    pub CCR3: u32,
    pub CCR4: u32,
    pub BDTR: u32,
    pub DCR: u32,
    pub DMAR: u32,
    pub OR: u32,
    pub CCMR3: u32,
    pub CCR5: u32,
    pub CCR6: u32,
    pub AF1: u32,
    pub AF2: u32,
}

@brief TIM

Fields

CR1: u32

< TIM control register 1, Address offset: 0x00

CR2: u32

< TIM control register 2, Address offset: 0x04

SMCR: u32

< TIM slave mode control register, Address offset: 0x08

DIER: u32

< TIM DMA/interrupt enable register, Address offset: 0x0C

SR: u32

< TIM status register, Address offset: 0x10

EGR: u32

< TIM event generation register, Address offset: 0x14

CCMR1: u32

< TIM capture/compare mode register 1, Address offset: 0x18

CCMR2: u32

< TIM capture/compare mode register 2, Address offset: 0x1C

CCER: u32

< TIM capture/compare enable register, Address offset: 0x20

CNT: u32

< TIM counter register, Address offset: 0x24

PSC: u32

< TIM prescaler register, Address offset: 0x28

ARR: u32

< TIM auto-reload register, Address offset: 0x2C

RCR: u32

< TIM repetition counter register, Address offset: 0x30

CCR1: u32

< TIM capture/compare register 1, Address offset: 0x34

CCR2: u32

< TIM capture/compare register 2, Address offset: 0x38

CCR3: u32

< TIM capture/compare register 3, Address offset: 0x3C

CCR4: u32

< TIM capture/compare register 4, Address offset: 0x40

BDTR: u32

< TIM break and dead-time register, Address offset: 0x44

DCR: u32

< TIM DMA control register, Address offset: 0x48

DMAR: u32

< TIM DMA address for full transfer, Address offset: 0x4C

OR: u32

< TIM option register Address offset: 0x50

CCMR3: u32

< TIM capture/compare mode register 3, Address offset: 0x54

CCR5: u32

< TIM capture/compare register5, Address offset: 0x58

CCR6: u32

< TIM capture/compare register6, Address offset: 0x5C

AF1: u32

< TIM Alternate function option register 1, Address offset: 0x60

AF2: u32

< TIM Alternate function option register 2, Address offset: 0x64

Trait Implementations

impl Debug for TIM_TypeDef

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.