Struct flipper0::ffi::LL_UTILS_ClkInitTypeDef

pub struct LL_UTILS_ClkInitTypeDef {
    pub CPU1CLKDivider: u32,
    pub CPU2CLKDivider: u32,
    pub AHB4CLKDivider: u32,
    pub APB1CLKDivider: u32,
    pub APB2CLKDivider: u32,
}

@brief UTILS System, AHB and APB buses clock configuration structure definition

Fields

CPU1CLKDivider: u32

< The CPU1 clock (HCLK1) divider. This clock is derived from the system clock (SYSCLK). This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV.

This feature can be modified afterwards using unitary function @ref LL_RCC_SetAHBPrescaler().

CPU2CLKDivider: u32

< The CPU2 clock (HCLK2) divider. This clock is derived from the system clock (SYSCLK). This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV.

This feature can be modified afterwards using unitary function @ref LL_C2_RCC_SetAHBPrescaler().

AHB4CLKDivider: u32

< The AHBS clock (HCLK4) divider. This clock is derived from the system clock (SYSCLK). This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV.

This feature can be modified afterwards using unitary function @ref LL_RCC_SetAHB4Prescaler().

APB1CLKDivider: u32

< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK1). This parameter can be a value of @ref RCC_LL_EC_APB1_DIV.

This feature can be modified afterwards using unitary function @ref LL_RCC_SetAPB1Prescaler().

APB2CLKDivider: u32

< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK1). This parameter can be a value of @ref RCC_LL_EC_APB2_DIV.

This feature can be modified afterwards using unitary function @ref LL_RCC_SetAPB2Prescaler().

Trait Implementations

impl Debug for LL_UTILS_ClkInitTypeDef

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.