Type Alias esp32c3::spi0::ctrl2::CS_HOLD_DELAY_W

pub type CS_HOLD_DELAY_W<'a, REG> = FieldWriter<'a, REG, 6>;

Field CS_HOLD_DELAY writer - These bits are used to set the minimum CS high time tSHSL between SPI burst transfer when accesses to flash. tSHSL is (SPI_MEM_CS_HOLD_DELAY[5:0] + 1) MSPI core clock cycles.

Aliased Type

struct CS_HOLD_DELAY_W<'a, REG> { /* private fields */ }