Type Alias esp32c3::extmem::icache_autoload_ctrl::R

pub type R = R<ICACHE_AUTOLOAD_CTRL_SPEC>;

Register ICACHE_AUTOLOAD_CTRL reader

Aliased Type

struct R { /* private fields */ }

Implementations

impl R

pub fn icache_autoload_sct0_ena(&self) -> ICACHE_AUTOLOAD_SCT0_ENA_R

Bit 0 - The bits are used to enable the first section for autoload operation.

pub fn icache_autoload_sct1_ena(&self) -> ICACHE_AUTOLOAD_SCT1_ENA_R

Bit 1 - The bits are used to enable the second section for autoload operation.

pub fn icache_autoload_ena(&self) -> ICACHE_AUTOLOAD_ENA_R

Bit 2 - The bit is used to enable and disable autoload operation. It is combined with icache_autoload_done. 1: enable, 0: disable.

pub fn icache_autoload_done(&self) -> ICACHE_AUTOLOAD_DONE_R

Bit 3 - The bit is used to indicate autoload operation is finished.

pub fn icache_autoload_order(&self) -> ICACHE_AUTOLOAD_ORDER_R

Bit 4 - The bits are used to configure the direction of autoload. 1: descending, 0: ascending.

pub fn icache_autoload_rqst(&self) -> ICACHE_AUTOLOAD_RQST_R

Bits 5:6 - The bits are used to configure trigger conditions for autoload. 0/3: cache miss, 1: cache hit, 2: both cache miss and hit.