Type Alias esp32c3::dma::int_ch::raw::W

pub type W = W<RAW_SPEC>;

Register RAW writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn in_done(&mut self) -> IN_DONE_W<'_, RAW_SPEC>

Bit 0 - The raw interrupt bit turns to high level when the last data pointed by one inlink descriptor has been received for Rx channel 0.

pub fn in_suc_eof(&mut self) -> IN_SUC_EOF_W<'_, RAW_SPEC>

Bit 1 - The raw interrupt bit turns to high level when the last data pointed by one inlink descriptor has been received for Rx channel 0. For UHCI0, the raw interrupt bit turns to high level when the last data pointed by one inlink descriptor has been received and no data error is detected for Rx channel 0.

pub fn in_err_eof(&mut self) -> IN_ERR_EOF_W<'_, RAW_SPEC>

Bit 2 - The raw interrupt bit turns to high level when data error is detected only in the case that the peripheral is UHCI0 for Rx channel 0. For other peripherals, this raw interrupt is reserved.

pub fn out_done(&mut self) -> OUT_DONE_W<'_, RAW_SPEC>

Bit 3 - The raw interrupt bit turns to high level when the last data pointed by one outlink descriptor has been transmitted to peripherals for Tx channel 0.

pub fn out_eof(&mut self) -> OUT_EOF_W<'_, RAW_SPEC>

Bit 4 - The raw interrupt bit turns to high level when the last data pointed by one outlink descriptor has been read from memory for Tx channel 0.

pub fn in_dscr_err(&mut self) -> IN_DSCR_ERR_W<'_, RAW_SPEC>

Bit 5 - The raw interrupt bit turns to high level when detecting inlink descriptor error, including owner error, the second and third word error of inlink descriptor for Rx channel 0.

pub fn out_dscr_err(&mut self) -> OUT_DSCR_ERR_W<'_, RAW_SPEC>

Bit 6 - The raw interrupt bit turns to high level when detecting outlink descriptor error, including owner error, the second and third word error of outlink descriptor for Tx channel 0.

pub fn in_dscr_empty(&mut self) -> IN_DSCR_EMPTY_W<'_, RAW_SPEC>

Bit 7 - The raw interrupt bit turns to high level when Rx buffer pointed by inlink is full and receiving data is not completed, but there is no more inlink for Rx channel 0.

pub fn out_total_eof(&mut self) -> OUT_TOTAL_EOF_W<'_, RAW_SPEC>

Bit 8 - The raw interrupt bit turns to high level when data corresponding a outlink (includes one link descriptor or few link descriptors) is transmitted out for Tx channel 0.

pub fn infifo_ovf(&mut self) -> INFIFO_OVF_W<'_, RAW_SPEC>

Bit 9 - This raw interrupt bit turns to high level when level 1 fifo of Rx channel 0 is overflow.

pub fn infifo_udf(&mut self) -> INFIFO_UDF_W<'_, RAW_SPEC>

Bit 10 - This raw interrupt bit turns to high level when level 1 fifo of Rx channel 0 is underflow.

pub fn outfifo_ovf(&mut self) -> OUTFIFO_OVF_W<'_, RAW_SPEC>

Bit 11 - This raw interrupt bit turns to high level when level 1 fifo of Tx channel 0 is overflow.

pub fn outfifo_udf(&mut self) -> OUTFIFO_UDF_W<'_, RAW_SPEC>

Bit 12 - This raw interrupt bit turns to high level when level 1 fifo of Tx channel 0 is underflow.