Type Alias esp32c3::assist_debug::core_0_montr_ena::R

pub type R = R<CORE_0_MONTR_ENA_SPEC>;

Register CORE_0_MONTR_ENA reader

Aliased Type

struct R { /* private fields */ }

Implementations

impl R

pub fn core_0_area_dram0_0_rd_ena(&self) -> CORE_0_AREA_DRAM0_0_RD_ENA_R

Bit 0 - reg_core_0_area_dram0_0_rd_ena

pub fn core_0_area_dram0_0_wr_ena(&self) -> CORE_0_AREA_DRAM0_0_WR_ENA_R

Bit 1 - reg_core_0_area_dram0_0_wr_ena

pub fn core_0_area_dram0_1_rd_ena(&self) -> CORE_0_AREA_DRAM0_1_RD_ENA_R

Bit 2 - reg_core_0_area_dram0_1_rd_ena

pub fn core_0_area_dram0_1_wr_ena(&self) -> CORE_0_AREA_DRAM0_1_WR_ENA_R

Bit 3 - reg_core_0_area_dram0_1_wr_ena

pub fn core_0_area_pif_0_rd_ena(&self) -> CORE_0_AREA_PIF_0_RD_ENA_R

Bit 4 - reg_core_0_area_pif_0_rd_ena

pub fn core_0_area_pif_0_wr_ena(&self) -> CORE_0_AREA_PIF_0_WR_ENA_R

Bit 5 - reg_core_0_area_pif_0_wr_ena

pub fn core_0_area_pif_1_rd_ena(&self) -> CORE_0_AREA_PIF_1_RD_ENA_R

Bit 6 - reg_core_0_area_pif_1_rd_ena

pub fn core_0_area_pif_1_wr_ena(&self) -> CORE_0_AREA_PIF_1_WR_ENA_R

Bit 7 - reg_core_0_area_pif_1_wr_ena

pub fn core_0_sp_spill_min_ena(&self) -> CORE_0_SP_SPILL_MIN_ENA_R

Bit 8 - reg_core_0_sp_spill_min_ena

pub fn core_0_sp_spill_max_ena(&self) -> CORE_0_SP_SPILL_MAX_ENA_R

Bit 9 - reg_core_0_sp_spill_max_ena

pub fn core_0_iram0_exception_monitor_ena( &self ) -> CORE_0_IRAM0_EXCEPTION_MONITOR_ENA_R

Bit 10 - reg_core_0_iram0_exception_monitor_ena

pub fn core_0_dram0_exception_monitor_ena( &self ) -> CORE_0_DRAM0_EXCEPTION_MONITOR_ENA_R

Bit 11 - reg_core_0_dram0_exception_monitor_ena