Type Alias esp32c3::usb_device::int_raw::W

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pub type W = W<INT_RAW_SPEC>;
Expand description

Register INT_RAW writer

Aliased Type§

struct W { /* private fields */ }

Implementations§

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impl W

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pub fn jtag_in_flush(&mut self) -> JTAG_IN_FLUSH_W<'_, INT_RAW_SPEC>

Bit 0 - The raw interrupt bit turns to high level when flush cmd is received for IN endpoint 2 of JTAG.

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pub fn sof(&mut self) -> SOF_W<'_, INT_RAW_SPEC>

Bit 1 - The raw interrupt bit turns to high level when SOF frame is received.

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pub fn serial_out_recv_pkt(&mut self) -> SERIAL_OUT_RECV_PKT_W<'_, INT_RAW_SPEC>

Bit 2 - The raw interrupt bit turns to high level when Serial Port OUT Endpoint received one packet.

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pub fn serial_in_empty(&mut self) -> SERIAL_IN_EMPTY_W<'_, INT_RAW_SPEC>

Bit 3 - The raw interrupt bit turns to high level when Serial Port IN Endpoint is empty.

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pub fn pid_err(&mut self) -> PID_ERR_W<'_, INT_RAW_SPEC>

Bit 4 - The raw interrupt bit turns to high level when pid error is detected.

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pub fn crc5_err(&mut self) -> CRC5_ERR_W<'_, INT_RAW_SPEC>

Bit 5 - The raw interrupt bit turns to high level when CRC5 error is detected.

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pub fn crc16_err(&mut self) -> CRC16_ERR_W<'_, INT_RAW_SPEC>

Bit 6 - The raw interrupt bit turns to high level when CRC16 error is detected.

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pub fn stuff_err(&mut self) -> STUFF_ERR_W<'_, INT_RAW_SPEC>

Bit 7 - The raw interrupt bit turns to high level when stuff error is detected.

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pub fn in_token_rec_in_ep1(&mut self) -> IN_TOKEN_REC_IN_EP1_W<'_, INT_RAW_SPEC>

Bit 8 - The raw interrupt bit turns to high level when IN token for IN endpoint 1 is received.

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pub fn usb_bus_reset(&mut self) -> USB_BUS_RESET_W<'_, INT_RAW_SPEC>

Bit 9 - The raw interrupt bit turns to high level when usb bus reset is detected.

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pub fn out_ep1_zero_payload( &mut self ) -> OUT_EP1_ZERO_PAYLOAD_W<'_, INT_RAW_SPEC>

Bit 10 - The raw interrupt bit turns to high level when OUT endpoint 1 received packet with zero palyload.

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pub fn out_ep2_zero_payload( &mut self ) -> OUT_EP2_ZERO_PAYLOAD_W<'_, INT_RAW_SPEC>

Bit 11 - The raw interrupt bit turns to high level when OUT endpoint 2 received packet with zero palyload.