Type Alias esp32c3::uart0::conf0::W

pub type W = W<CONF0_SPEC>;

Register CONF0 writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn parity(&mut self) -> PARITY_W<'_, CONF0_SPEC>

Bit 0 - This register is used to configure the parity check mode.

pub fn parity_en(&mut self) -> PARITY_EN_W<'_, CONF0_SPEC>

Bit 1 - Set this bit to enable uart parity check.

pub fn bit_num(&mut self) -> BIT_NUM_W<'_, CONF0_SPEC>

Bits 2:3 - This register is used to set the length of data.

pub fn stop_bit_num(&mut self) -> STOP_BIT_NUM_W<'_, CONF0_SPEC>

Bits 4:5 - This register is used to set the length of stop bit.

pub fn sw_rts(&mut self) -> SW_RTS_W<'_, CONF0_SPEC>

Bit 6 - This register is used to configure the software rts signal which is used in software flow control.

pub fn sw_dtr(&mut self) -> SW_DTR_W<'_, CONF0_SPEC>

Bit 7 - This register is used to configure the software dtr signal which is used in software flow control.

pub fn txd_brk(&mut self) -> TXD_BRK_W<'_, CONF0_SPEC>

Bit 8 - Set this bit to enbale transmitter to send NULL when the process of sending data is done.

pub fn irda_dplx(&mut self) -> IRDA_DPLX_W<'_, CONF0_SPEC>

Bit 9 - Set this bit to enable IrDA loopback mode.

pub fn irda_tx_en(&mut self) -> IRDA_TX_EN_W<'_, CONF0_SPEC>

Bit 10 - This is the start enable bit for IrDA transmitter.

pub fn irda_wctl(&mut self) -> IRDA_WCTL_W<'_, CONF0_SPEC>

Bit 11 - 1’h1: The IrDA transmitter’s 11th bit is the same as 10th bit. 1’h0: Set IrDA transmitter’s 11th bit to 0.

pub fn irda_tx_inv(&mut self) -> IRDA_TX_INV_W<'_, CONF0_SPEC>

Bit 12 - Set this bit to invert the level of IrDA transmitter.

pub fn irda_rx_inv(&mut self) -> IRDA_RX_INV_W<'_, CONF0_SPEC>

Bit 13 - Set this bit to invert the level of IrDA receiver.

pub fn loopback(&mut self) -> LOOPBACK_W<'_, CONF0_SPEC>

Bit 14 - Set this bit to enable uart loopback test mode.

pub fn tx_flow_en(&mut self) -> TX_FLOW_EN_W<'_, CONF0_SPEC>

Bit 15 - Set this bit to enable flow control function for transmitter.

pub fn irda_en(&mut self) -> IRDA_EN_W<'_, CONF0_SPEC>

Bit 16 - Set this bit to enable IrDA protocol.

pub fn rxfifo_rst(&mut self) -> RXFIFO_RST_W<'_, CONF0_SPEC>

Bit 17 - Set this bit to reset the uart receive-FIFO.

pub fn txfifo_rst(&mut self) -> TXFIFO_RST_W<'_, CONF0_SPEC>

Bit 18 - Set this bit to reset the uart transmit-FIFO.

pub fn rxd_inv(&mut self) -> RXD_INV_W<'_, CONF0_SPEC>

Bit 19 - Set this bit to inverse the level value of uart rxd signal.

pub fn cts_inv(&mut self) -> CTS_INV_W<'_, CONF0_SPEC>

Bit 20 - Set this bit to inverse the level value of uart cts signal.

pub fn dsr_inv(&mut self) -> DSR_INV_W<'_, CONF0_SPEC>

Bit 21 - Set this bit to inverse the level value of uart dsr signal.

pub fn txd_inv(&mut self) -> TXD_INV_W<'_, CONF0_SPEC>

Bit 22 - Set this bit to inverse the level value of uart txd signal.

pub fn rts_inv(&mut self) -> RTS_INV_W<'_, CONF0_SPEC>

Bit 23 - Set this bit to inverse the level value of uart rts signal.

pub fn dtr_inv(&mut self) -> DTR_INV_W<'_, CONF0_SPEC>

Bit 24 - Set this bit to inverse the level value of uart dtr signal.

pub fn clk_en(&mut self) -> CLK_EN_W<'_, CONF0_SPEC>

Bit 25 - 1’h1: Force clock on for register. 1’h0: Support clock only when application writes registers.

pub fn err_wr_mask(&mut self) -> ERR_WR_MASK_W<'_, CONF0_SPEC>

Bit 26 - 1’h1: Receiver stops storing data into FIFO when data is wrong. 1’h0: Receiver stores the data even if the received data is wrong.

pub fn autobaud_en(&mut self) -> AUTOBAUD_EN_W<'_, CONF0_SPEC>

Bit 27 - This is the enable bit for detecting baudrate.

pub fn mem_clk_en(&mut self) -> MEM_CLK_EN_W<'_, CONF0_SPEC>

Bit 28 - UART memory clock gate enable signal.