Type Alias esp32c3::spi1::user::W

pub type W = W<USER_SPEC>;

Register USER writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn ck_out_edge(&mut self) -> CK_OUT_EDGE_W<'_, USER_SPEC>

Bit 9 - the bit combined with spi_mem_mosi_delay_mode bits to set mosi signal delay mode.

pub fn fwrite_dual(&mut self) -> FWRITE_DUAL_W<'_, USER_SPEC>

Bit 12 - In the write operations read-data phase apply 2 signals

pub fn fwrite_quad(&mut self) -> FWRITE_QUAD_W<'_, USER_SPEC>

Bit 13 - In the write operations read-data phase apply 4 signals

pub fn fwrite_dio(&mut self) -> FWRITE_DIO_W<'_, USER_SPEC>

Bit 14 - In the write operations address phase and read-data phase apply 2 signals.

pub fn fwrite_qio(&mut self) -> FWRITE_QIO_W<'_, USER_SPEC>

Bit 15 - In the write operations address phase and read-data phase apply 4 signals.

pub fn usr_miso_highpart(&mut self) -> USR_MISO_HIGHPART_W<'_, USER_SPEC>

Bit 24 - read-data phase only access to high-part of the buffer spi_mem_w8~spi_mem_w15. 1: enable 0: disable.

pub fn usr_mosi_highpart(&mut self) -> USR_MOSI_HIGHPART_W<'_, USER_SPEC>

Bit 25 - write-data phase only access to high-part of the buffer spi_mem_w8~spi_mem_w15. 1: enable 0: disable.

pub fn usr_dummy_idle(&mut self) -> USR_DUMMY_IDLE_W<'_, USER_SPEC>

Bit 26 - SPI clock is disable in dummy phase when the bit is enable.

pub fn usr_mosi(&mut self) -> USR_MOSI_W<'_, USER_SPEC>

Bit 27 - This bit enable the write-data phase of an operation.

pub fn usr_miso(&mut self) -> USR_MISO_W<'_, USER_SPEC>

Bit 28 - This bit enable the read-data phase of an operation.

pub fn usr_dummy(&mut self) -> USR_DUMMY_W<'_, USER_SPEC>

Bit 29 - This bit enable the dummy phase of an operation.

pub fn usr_addr(&mut self) -> USR_ADDR_W<'_, USER_SPEC>

Bit 30 - This bit enable the address phase of an operation.

pub fn usr_command(&mut self) -> USR_COMMAND_W<'_, USER_SPEC>

Bit 31 - This bit enable the command phase of an operation.