Type Alias esp32c3::sensitive::core_x_iram0_dram0_dma_split_line_constrain_0::W
source · pub type W = W<CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_0_SPEC>;Expand description
Register CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_0 writer
Aliased Type§
struct W { /* private fields */ }Implementations§
source§impl W
impl W
sourcepub fn core_x_iram0_dram0_dma_split_line_constrain_lock(
&mut self
) -> CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_LOCK_W<'_, CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_0_SPEC>
pub fn core_x_iram0_dram0_dma_split_line_constrain_lock( &mut self ) -> CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_LOCK_W<'_, CORE_X_IRAM0_DRAM0_DMA_SPLIT_LINE_CONSTRAIN_0_SPEC>
Bit 0 - core_x_iram0_dram0_dma_split_line_constrain_lock