Type Alias esp32c3::efuse::rd_repeat_data0::R

pub type R = R<RD_REPEAT_DATA0_SPEC>;

Register RD_REPEAT_DATA0 reader

Aliased Type

struct R { /* private fields */ }

Implementations

impl R

pub fn rd_dis(&self) -> RD_DIS_R

Bits 0:6 - Set this bit to disable reading from BlOCK4-10.

pub fn dis_rtc_ram_boot(&self) -> DIS_RTC_RAM_BOOT_R

Bit 7 - Set this bit to disable boot from RTC RAM.

pub fn dis_icache(&self) -> DIS_ICACHE_R

Bit 8 - Set this bit to disable Icache.

pub fn dis_usb_jtag(&self) -> DIS_USB_JTAG_R

Bit 9 - Set this bit to disable function of usb switch to jtag in module of usb device.

pub fn dis_download_icache(&self) -> DIS_DOWNLOAD_ICACHE_R

Bit 10 - Set this bit to disable Icache in download mode (boot_mode[3:0] is 0, 1, 2, 3, 6, 7).

pub fn dis_usb_device(&self) -> DIS_USB_DEVICE_R

Bit 11 - Set this bit to disable usb device.

pub fn dis_force_download(&self) -> DIS_FORCE_DOWNLOAD_R

Bit 12 - Set this bit to disable the function that forces chip into download mode.

pub fn rpt4_reserved6(&self) -> RPT4_RESERVED6_R

Bit 13 - Reserved (used for four backups method).

pub fn dis_can(&self) -> DIS_CAN_R

Bit 14 - Set this bit to disable CAN function.

pub fn jtag_sel_enable(&self) -> JTAG_SEL_ENABLE_R

Bit 15 - Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0.

pub fn soft_dis_jtag(&self) -> SOFT_DIS_JTAG_R

Bits 16:18 - Set these bits to disable JTAG in the soft way (odd number 1 means disable ). JTAG can be enabled in HMAC module.

pub fn dis_pad_jtag(&self) -> DIS_PAD_JTAG_R

Bit 19 - Set this bit to disable JTAG in the hard way. JTAG is disabled permanently.

pub fn dis_download_manual_encrypt(&self) -> DIS_DOWNLOAD_MANUAL_ENCRYPT_R

Bit 20 - Set this bit to disable flash encryption when in download boot modes.

pub fn usb_drefh(&self) -> USB_DREFH_R

Bits 21:22 - Controls single-end input threshold vrefh, 1.76 V to 2 V with step of 80 mV, stored in eFuse.

pub fn usb_drefl(&self) -> USB_DREFL_R

Bits 23:24 - Controls single-end input threshold vrefl, 0.8 V to 1.04 V with step of 80 mV, stored in eFuse.

pub fn usb_exchg_pins(&self) -> USB_EXCHG_PINS_R

Bit 25 - Set this bit to exchange USB D+ and D- pins.

pub fn vdd_spi_as_gpio(&self) -> VDD_SPI_AS_GPIO_R

Bit 26 - Set this bit to vdd spi pin function as gpio.

pub fn btlc_gpio_enable(&self) -> BTLC_GPIO_ENABLE_R

Bits 27:28 - Enable btlc gpio.

pub fn powerglitch_en(&self) -> POWERGLITCH_EN_R

Bit 29 - Set this bit to enable power glitch function.

pub fn power_glitch_dsense(&self) -> POWER_GLITCH_DSENSE_R

Bits 30:31 - Sample delay configuration of power glitch.